SIRA00DP-T1-GE3 Vishay/Siliconix, SIRA00DP-T1-GE3 Datasheet

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SIRA00DP-T1-GE3

Manufacturer Part Number
SIRA00DP-T1-GE3
Description
MOSFET 30V 1mOhm@10V 60A N-Ch G-IV
Manufacturer
Vishay/Siliconix
Datasheet

Specifications of SIRA00DP-T1-GE3

Product Category
MOSFET
Rohs
yes
Transistor Polarity
N-Channel
Drain-source Breakdown Voltage
30 V
Gate-source Breakdown Voltage
2.2 V
Continuous Drain Current
60 A
Resistance Drain-source Rds (on)
1 mOhms at 10 V
Configuration
Single Quad Drain Triple Source
Maximum Operating Temperature
+ 150 C
Mounting Style
SMD/SMT
Package / Case
PowerPAK SO-8
Fall Time
11 ns
Forward Transconductance Gfs (max / Min)
140 S
Gate Charge Qg
66 nC
Minimum Operating Temperature
- 55 C
Power Dissipation
104 W
Rise Time
14 ns
Typical Turn-off Delay Time
67 ns
Part # Aliases
SIRA00DP-GE3

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SIRA00DP-T1-GE3
Manufacturer:
VISHAY/威世
Quantity:
20 000
Company:
Part Number:
SIRA00DP-T1-GE3
Quantity:
9 000
Company:
Part Number:
SIRA00DP-T1-GE3
Quantity:
50
Company:
Part Number:
SIRA00DP-T1-GE3
Quantity:
70 000
Notes:
a. Based on T
b. Surface mounted on 1" x 1" FR4 board.
c. t = 10 s.
d. See solder profile (www.vishay.com/doc?73257). The PowerPAK SO-8 is a leadless package. The end of the lead terminal is exposed copper
e. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components.
f. Maximum under steady state conditions is 54 °C/W.
g. Package limited.
Document Number: 63780
S13-0828-Rev. B, 22-Apr-13
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
PRODUCT SUMMARY
ABSOLUTE MAXIMUM RATINGS (T
Parameter
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current (T
Pulsed Drain Current (t = 300 µs)
Continuous Source-Drain Diode Current
Single Pulse Avalanche Current
Single Pulse Avalanche Energy
Maximum Power Dissipation
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)
THERMAL RESISTANCE RATINGS
Parameter
Maximum Junction-to-Ambient
Maximum Junction-to-Case (Drain)
V
(not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not
required to ensure adequate bottom side solder interconnection.
DS
30
(V)
Ordering Information:
SiRA00DP-T1-GE3 (Lead (Pb)-free and Halogen-free)
C
8
D
= 25 °C.
0.00135 at V
6.15 mm
0.00100 at V
R
7
DS(on)
D
6
D
() (Max.)
5
GS
GS
D
J
= 150 °C)
= 4.5 V
= 10 V
b, f
PowerPAK
Bottom View
For technical questions, contact:
1
S
N-Channel 30 V (D-S) MOSFET
2
S
I
®
D
3
S
SO-8
(A)
100
100
5.15 mm
This document is subject to change without notice.
4
a, g
G
d, e
A
Q
= 25 °C, unless otherwise noted)
Steady State
g
66 nC
T
T
T
T
T
T
L =0.1 mH
T
T
T
T
(Typ.)
C
C
A
A
C
A
C
C
A
A
t  10 s
= 25 °C
= 70 °C
= 25 °C
= 25 °C
= 70 °C
= 25 °C
= 70 °C
= 25 °C
= 25 °C
= 70 °C
pmostechsupport@vishay.com
FEATURES
APPLICATIONS
• TrenchFET
• 100 % R
• Material categorization:
• ORing
• High Power Density DC/DC
• VRMs and Embedded DC/DC
Symbol
Symbol
T
R
R
For definitions of compliance please see
www.vishay.com/doc?99912
Synchronous Rectification
J
V
V
E
I
I
P
, T
I
DM
thJC
I
AS
thJA
DS
GS
AS
D
S
D
stg
g
and UIS Tested
®
Gen IV Power MOSFET
Typical
0.9
15
- 55 to 150
+ 20, - 16
6.25
5.6
Limit
58
47
100
100
66.6
4
400
125
104
260
60
30
50
b, c
b, c
b, c
b, c
g
b, c
g
g
Maximum
1.2
20
Vishay Siliconix
www.vishay.com/doc?91000
SiRA00DP
G
N-Channel MOSFET
www.vishay.com
°C/W
Unit
Unit
mJ
D
S
°C
W
V
A
1

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SIRA00DP-T1-GE3 Summary of contents

Page 1

... Bottom View Ordering Information: SiRA00DP-T1-GE3 (Lead (Pb)-free and Halogen-free) ABSOLUTE MAXIMUM RATINGS (T Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current (T = 150 °C) J Pulsed Drain Current (t = 300 µs) Continuous Source-Drain Diode Current Single Pulse Avalanche Current Single Pulse Avalanche Energy ...

Page 2

... SiRA00DP Vishay Siliconix SPECIFICATIONS ( °C, unless otherwise noted) J Parameter Static Drain-Source Breakdown Voltage V Temperature Coefficient DS V Temperature Coefficient GS(th) Gate-Source Threshold Voltage Gate-Source Leakage Zero Gate Voltage Drain Current a On-State Drain Current a Drain-Source On-State Resistance a Forward Transconductance b Dynamic Input Capacitance Output Capacitance ...

Page 3

... C rss 1 1.5 1.3 1.1 0.9 0 120 150 On-Resistance vs. Junction Temperature pmostechsupport@vishay.com This document is subject to change without notice. SiRA00DP Vishay Siliconix = 25 ° ° 0.8 1.6 2.4 3.2 4 Gate-to-Source Voltage (V) GS Transfer Characteristics C iss C oss ...

Page 4

... SiRA00DP Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) 100 = 150 ° ° 0.1 0.01 0.001 0.0 0.2 0.4 0.6 0 Source-to-Drain Voltage (V) SD Source-Drain Diode Forward Voltage 0.5 0 250 μ 0 100 T - Temperature (°C) J Threshold Voltage 1000 100 10 1 0.1 0.01 www.vishay.com ...

Page 5

... Case Temperature (°C) C Current Derating* 3.0 2.4 1.8 1.2 0.6 0.0 125 150 0 = 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper pmostechsupport@vishay.com This document is subject to change without notice. SiRA00DP Vishay Siliconix 150 100 125 150 T - Ambient Temperature (°C) A Power, Junction-to-Ambient www.vishay.com www.vishay.com/doc?91000 ...

Page 6

... SiRA00DP Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) 1 Duty Cycle = 0.5 0.2 0.1 0.1 0.05 0.02 Single Pulse 0.01 0.0001 0.001 0.01 Normalized Thermal Transient Impedance, Junction-to-Ambient 1 Duty Cycle = 0.5 0.2 0.1 0.05 0.02 0.1 Single Pulse 0.01 0.0001 0.001 Normalized Thermal Transient Impedance, Junction-to-Case Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations ...

Page 7

PowerPAK SO-8, (SINGLE/DUAL Notes 1. Inch will govern. 2 Dimensions exclusive of mold gate burrs. 3. Dimensions exclusive of mold flash and cutting burrs. DIM. MIN. A 0.97 A1 0.00 b ...

Page 8

... PowerPAK thermal performance see Application Note 826, Recommended Minimum Pad Patterns With Outline Drawing Access for Vishay Sili- conix MOSFETs. Click on the PowerPAK SO-8 single in the index of this document. In this figure, the drain land pattern is given to make full contact to the drain pad on the PowerPAK package. ...

Page 9

... Application Note 826, Recommended Minimum Pad Patterns With Outline Drawing Access for Vishay Siliconix MOSFETs. Click on the PowerPAK 1212-8 dual in the index of this doc- ument. The gap between the two drain pads is 24 mils. This matches the spacing of the two drain pads on the Pow- erPAK SO-8 dual package ...

Page 10

THERMAL PERFORMANCE Introduction A basic measure of a device’s thermal performance is the junction-to-case thermal resistance, Rθ junction-to-foot thermal resistance, Rθ is measured for the device mounted to an infinite heat sink and is therefore a characterization of the device ...

Page 11

AN821 Vishay Siliconix SYSTEM AND ELECTRICAL IMPACT OF PowerPAK SO-8 In any design, one must take into account the change in MOSFET r with temperature (Figure 7). DS(on) On-Resistance vs. Junction Temperature 1 1.6 I ...

Page 12

RECOMMENDED MINIMUM PADS FOR PowerPAK 0.024 (0.61) 0.026 (0.66) 0.050 (1.27) Return to Index Return to Index Document Number: 72599 Revision: 21-Jan-08 ® SO-8 Single 0.260 (6.61) 0.150 (3.81) 0.032 (0.82) Recommended Minimum Pads Dimensions in Inches/(mm) Application Note 826 ...

Page 13

ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), ...

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