24LCS52-I/SN Microchip Technology, 24LCS52-I/SN Datasheet - Page 8

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24LCS52-I/SN

Manufacturer Part Number
24LCS52-I/SN
Description
IC EEPROM 2KBIT 400KHZ 8SOIC
Manufacturer
Microchip Technology
Datasheets

Specifications of 24LCS52-I/SN

Memory Size
2K (256 x 8)
Package / Case
8-SOIC (3.9mm Width)
Operating Temperature
-40°C ~ 85°C
Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Speed
100kHz, 400kHz
Interface
I²C, 2-Wire Serial
Voltage - Supply
2.2 V ~ 5.5 V
Organization
256 K x 8
Interface Type
I2C
Maximum Clock Frequency
0.4 MHz
Access Time
900 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.2 V
Maximum Operating Current
3 mA
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
2.2 V, 5.5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
24LCS52-I/SN
Manufacturer:
MCP
Quantity:
2 000
24AA52/24LCS52
5.0
Since the device will not acknowledge during a write
cycle, this can be used to determine when the cycle is
complete (this feature can be used to maximize bus
throughput). Once the Stop condition for a Write
command has been issued from the master, the device
initiates the internally timed write cycle. ACK polling
can be initiated immediately. This involves the master
sending a Start condition followed by the control byte
for a Write command (R/W =
busy with the write cycle, then no ACK will be returned.
If the cycle is complete, then the device will return the
ACK and the master can then proceed with the next
Read or Write command. See Figure 5-1 for flow
diagram.
FIGURE 5-1:
FIGURE 6-1:
DS21166G-page 8
SDA LINE
BUS ACTIVITY
MASTER
BUS ACTIVITY
ACKNOWLEDGE POLLING
Initiate Write Cycle
Send Control Byte
Write Command
with R/W = 0
Acknowledge
Condition to
Send Stop
(ACK = 0)?
Did Device
Send Start
Operation
S
S
T
A
R
T
Send
Next
ACKNOWLEDGE
POLLING FLOW
SETTING WRITE-PROTECT REGISTER
Yes
CONTROL
0
BYTE
). If the device is still
No
A
C
K
ADDRESS
WORD
6.0
The 24XX52 has a software write-protect feature that
allows the lower half of the array (addresses 00h - 7Fh)
to be permanently write-protected, as well as a WP pin
that can be used to protect the entire array.
6.1
The software write-protect feature is invoked by writing
to the write-protect register. This is done by sending a
command similar to a normal Write command. As
shown in Figure 6-1, the write-protect register is written
by sending a Write command with the slave address
set to ‘0110’ instead of ‘1010’ and the address bits and
data bits are don’t cares. Once the software write-pro-
tect register has been written, the device will not
acknowledge the ‘0110’ control byte.
6.2
The WP pin can be tied to V
ing. If tied to V
regardless of whether the software write-protect register
has been written or not. If the WP pin is set to V
prevent the software write-protect register from being
written. If the WP is tied to V
protection is determined by the status of the software
write-protect register.
Note:
WRITE PROTECTION
Software Write-Protect
Hardware Write-Protect
Once the software write-protect register
has been written, the write protection is
enabled and cannot be reversed, even if
the device is powered down.
CC
A
C
K
, the entire array will be write-protected,
 2003 Microchip Technology Inc.
SS
CC
DATA
, V
or left floating, then write
SS
or can be left float-
A
C
K
CC
P
S
T
O
P
, it will

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