SST89E554RC-40-I-PI Microchip Technology, SST89E554RC-40-I-PI Datasheet - Page 41
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SST89E554RC-40-I-PI
Manufacturer Part Number
SST89E554RC-40-I-PI
Description
8-bit Microcontrollers - MCU 32KB+8KB 40ns
Manufacturer
Microchip Technology
Datasheet
1.SST89E564RD-40-I-NJE.pdf
(90 pages)
Specifications of SST89E554RC-40-I-PI
Core
8051
Data Bus Width
8 bit
Maximum Clock Frequency
40 MHz
Program Memory Size
32 KB
Data Ram Size
1 KB
Operating Supply Voltage
4.5 V to 5.5 V
Package / Case
PDIP-40
Mounting Style
Through Hole
Data Rom Size
128 B
Interface Type
SPI, UART
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
32
Number Of Timers
16 bit
Processor Series
FlashFlex
Program Memory Type
Flash
Supply Voltage - Max
5.5 V
Supply Voltage - Min
4.5 V
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
SST89E554RC-40-I-PI
Manufacturer:
MAXIM
Quantity:
24
FlashFlex MCU
SST89E564RD / SST89V564RD
SST89E554RC / SST89V554RC
4.2.4.7 Prog-SC0, Prog-SC1
Prog-SC0 command is used to program the SC0 bit. This
command only changes the SC0 bit and has no effect on
BSEL bit until after a reset cycle.
SC0 bit previously in un-programmed state can be pro-
grammed by this command. The Prog-SC0 command
should reside only in Block 1 or external code memory.
Prog-SC1 command is used to program the SC1 bit. This
command only changes the SC1 bit and has no effect on
SFCF[1] bit until after a reset cycle.
SC1 bit previously in un-programmed state can be pro-
grammed by this command. The Prog-SC1 command
should reside only in Block 1 or external code memory.
4.2.4.8 Enable-Clock-Double
Enable-Clock-Double command is used to make the MCU
run at 6 clocks per machine cycle. The standard (default) is
12 clocks per machine cycle (i.e. clock double command
disabled).
.
©2007 Silicon Storage Technology, Inc.
Program SC0 or SC1 -
Set-up Program SC0
indicates completion
MOV SFDT, #0AAH
MOV SFCM, #09H
MOV SFAH, #5AH
Polling SFST[2]
Polling scheme
ORL SFCF, #40H
IAP Enable
Program SC0 or SC1 -
Set-up Program SC1
indicates completion
MOV SFAH, #0AAH
MOV SFDT, #0AAH
MOV SFCM, #89H
Interrupt scheme
INT1# Interrupt
1207 F49.2
41
There are no IAP counterparts for the external host com-
mands Select-Block0 and Select-Block1.
4.2.5 Polling
A command that uses the polling method to detect flash
operation completion should poll on the FLASH_BUSY bit
(SFST[2]). When FLASH_BUSY de-asserts (logic 0), the
device is ready for the next operation.
MOVC instruction may also be used for verification of the
Programming and Erase operation of the flash memory.
MOVC instruction will fail if it is directed at a flash block that
is still busy.
4.2.6 Interrupt Termination
If interrupt termination is selected, (SFCM[7] is set), then
an interrupt (INT1) will be generated to indicate flash opera-
tion completion. Under this condition, the INT1 becomes an
internal interrupt source. The INT1# pin can now be used
as a general purpose port pin and it cannot be the source
of External Interrupt 1 during in-application programming.
In order to use an interrupt to signal flash operation termi-
nation. EX1 and EA bits of IE register must be set. The IT1
bit of TCON register must also be set for edge trigger
detection.
Program Enable-Clock-Double
indicates completion
MOV SFCM, #08H
Polling SFST[2]
Polling scheme
Set-up Enable-Clock-Double
MOV SFDT, #0AAH
MOV SFAH, #55H
ORL SFCF, #40H
IAP Enable
Program Enable-Clock-Double
indicates completion
MOV SFCM, #88H
Interrupt scheme
INT1# Interrupt
S71207-08-EOL
EOL Data Sheet
1207 F50.1
1/07