MT46V8M16TG-6T L:D TR Micron Technology Inc, MT46V8M16TG-6T L:D TR Datasheet - Page 73

IC DDR SDRAM 128MBIT 6NS 66TSOP

MT46V8M16TG-6T L:D TR

Manufacturer Part Number
MT46V8M16TG-6T L:D TR
Description
IC DDR SDRAM 128MBIT 6NS 66TSOP
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT46V8M16TG-6T L:D TR

Format - Memory
RAM
Memory Type
DDR SDRAM
Memory Size
128M (8Mx16)
Speed
6ns
Interface
Parallel
Voltage - Supply
2.3 V ~ 2.7 V
Operating Temperature
0°C ~ 70°C
Package / Case
66-TSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
557-1042-2
Figure 46:
PDF: 09005aef816fd013/Source: 09005aef82a95a3a
DDR_x4x8x16_Core2.fm - 128Mb DDR: Rev. F; Core DDR: Rev. A 4/07 EN
COMMAND
ADDRESS
BA0, BA1
DQ 5
DQS
CK#
CKE
A10
DM
CK
t
t
Bank WRITE – Without Auto Precharge
IS
IS
NOP 1
T0
t
t
IH
IH
Notes:
t
t
Bank x
IS
IS
Row
Row
ACT
1. NOP commands are shown for ease of illustration; other commands may be valid at these
2. BL = 4.
3. Disable auto precharge.
4. “Don’t Care” if A10 is HIGH at T8.
5. DI b = data-in from column b; subsequent elements are provided in the programmed order.
6. See Figure 48 on page 75 for detailed DQ timing.
T1
t
t
IH
IH
times.
t
CK
t
t
RCD
RAS
NOP 1
T2
t
CH
t
CL
WRITE 2
t
Bank x
Col n
IS
3
T3
t
t
DQSS (NOM)
IH
t
WPRES
73
t DS
t
WPRE
NOP 1
T4
DI
b
t DH
Micron Technology, Inc., reserves the right to change products or specifications without notice.
T4n
t
DQSL
NOP 1
T5
128Mb: x4, x8, x16 DDR SDRAM
t
DQSH
T5n
t
WPST
DON’T CARE
NOP 1
T6
©2004 Micron Technology, Inc. All rights reserved.
t
NOP 1
WR
T7
TRANSITIONING DATA
Operations
ALL BANKS
ONE BANK
Bank x 4
T8
PRE
t
RP

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