ATXMEGA256A3-MU Atmel, ATXMEGA256A3-MU Datasheet - Page 43

• Manufacturer Part Number: ATXMEGA256A3-MU
• Description: 8-bit Microcontrollers - MCU 8/16 bit 1.6V-3.6V 256KB + 8KB
• Manufacturer: Atmel

Specifications of ATXMEGA256A3-MU

• Product Category: 8-bit Microcontrollers - MCU
• Rohs: yes
• Core: AVR
• Data Bus Width: 8 bit/16 bit
• Maximum Clock Frequency: 32 MHz
• Program Memory Size: 256 KB
• Data Ram Size: 16 KB
• On-chip Adc: Yes
• Package / Case: QFN EP
• Mounting Style: SMD/SMT
• A/d Bit Size: 12 bit
• A/d Channels Available: 8
• Data Rom Size: 4 KB
• Interface Type: I2C, SPI, USART
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 50
• Number Of Timers: 7
• Processor Series: ATXMega
• Program Memory Type: Flash
• Factory Pack Quantity: 260
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 1.6 V

26. DAC - 12-bit Digital to Analog Converter
26.1
26.2
8068T–AVR–12/10
Features
Overview
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The XMEGA A3 features one two-channel, 12-bit, 1 Msps DACs with built-in offset and gain cal-
ibration, see
A DAC converts a digital value into an analog signal. The DAC may use an internal 1.0 voltage
as the upper limit for conversion, but it is also possible to use the supply voltage or any applied
voltage in-between. The external reference input is shared with the ADC reference input.
Figure 26-1. DAC overview
The DAC has one continuous output with high drive capabilities for both resistive and capacitive
loads. It is also possible to split the continuous time channel into two Sample and Hold (S/H)
channels, each with separate data conversion registers.
A DAC conversion may be started from the application software by writing the data conversion
registers. The DAC can also be configured to do conversions triggered by the Event System to
have regular timing, independent of the application software. DMA may be used for transferring
data from memory locations to DAC data registers.
The DAC has a built-in calibration system to reduce offset and gain error when loading with a
calibration value from software.
PORTB each has one DAC. Notation of this peripheral is DACB.
One DAC with 12-bit resolution
Up to 1 Msps conversion rate for each DAC
Flexible conversion range
Multiple trigger sources
1 continuous output or 2 Sample and Hold (S/H) outputs for each DAC
Built-in offset and gain calibration
High drive capabilities
Low Power Mode
Figure 26-1 on page
Channel A
Channel B
Register
Register
43.
Reference selection
Configuration
Trigger
DAC
Event
Channel A
Channel B
XMEGA A3
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