ATXMEGA256A3-MU Atmel, ATXMEGA256A3-MU Datasheet - Page 102

• Manufacturer Part Number: ATXMEGA256A3-MU
• Description: 8-bit Microcontrollers - MCU 8/16 bit 1.6V-3.6V 256KB + 8KB
• Manufacturer: Atmel

Specifications of ATXMEGA256A3-MU

• Product Category: 8-bit Microcontrollers - MCU
• Rohs: yes
• Core: AVR
• Data Bus Width: 8 bit/16 bit
• Maximum Clock Frequency: 32 MHz
• Program Memory Size: 256 KB
• Data Ram Size: 16 KB
• On-chip Adc: Yes
• Package / Case: QFN EP
• Mounting Style: SMD/SMT
• A/d Bit Size: 12 bit
• A/d Channels Available: 8
• Data Rom Size: 4 KB
• Interface Type: I2C, SPI, USART
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 50
• Number Of Timers: 7
• Processor Series: ATXMega
• Program Memory Type: Flash
• Factory Pack Quantity: 260
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 1.6 V

8068T–AVR–12/10
5. ADC Event on compare match non-functional
6. Bandgap measurement with the ADC is non-functional when VCC is below 2.7V
7. Accuracy lost on first three samples after switching input to ADC gain stage
8. Configuration of PGM and CWCM not as described in XMEGA A Manual
Table 36-2.
9. PWM is not restarted properly after a fault in cycle-by-cycle mode
10. BOD will be enabled after any reset
Problem fix/Workaround
Keep the amplified voltage output from the ADC gain stage below 2.4 V in order to get a cor-
rect result, or keep ADC voltage reference below 2.4 V.
ADC signalling event will be given at every conversion complete even if Interrupt mode (INT-
MODE) is set to BELOW or ABOVE.
Problem fix/Workaround
Enable and use interrupt on compare match when using the compare function.
The ADC can not be used to do bandgap measurements when VCC is below 2.7V.
Problem fix/Workaround
None.
Due to memory effect in the ADC gain stage, the first three samples after changing input
channel must be disregarded to achieve 12-bit accuracy.
Problem fix/Workaround
Run three ADC conversions and discard these results after changing input channels to ADC
gain stage.
Enabling Common Waveform Channel Mode will enable Pattern generation mode (PGM),
but not Common Waveform Channel Mode.
Enabling Pattern Generation Mode (PGM) and not Common Waveform Channel Mode
(CWCM) will enable both Pattern Generation Mode and Common Waveform Channel Mode.
Problem fix/Workaround
When the AWeX fault restore mode is set to cycle-by-cycle, the waveform output will not
return to normal operation at first update after fault condition is no longer present.
Problem fix/Workaround
Do a write to any AWeX I/O register to re-enable the output.
If any reset source goes active, the BOD will be enabled and keep the device in reset if the
VCC voltage is below the programmed BOD level. During Power-On Reset, reset will not be
released until VCC is above the programmed BOD level even if the BOD is disabled.
PGM
0
0
1
1
Configure PWM and CWCM according to this table:
CWCM
0
1
0
1
Description
PGM and CWCM disabled
PGM enabled
PGM and CWCM enabled
PGM enabled
XMEGA A3
102