CY7C019V-20AXI Cypress Semiconductor Corp, CY7C019V-20AXI Datasheet - Page 5
![no-image](/images/manufacturer_photos/0/1/179/cypress_semiconductor_corp_sml.jpg)
CY7C019V-20AXI
Manufacturer Part Number
CY7C019V-20AXI
Description
IC SRAM 1.152MBIT 20NS 100LQFP
Manufacturer
Cypress Semiconductor Corp
Datasheet
1.CY7C008V-25AXC.pdf
(18 pages)
Specifications of CY7C019V-20AXI
Format - Memory
RAM
Memory Type
SRAM - Dual Port, Asynchronous
Memory Size
1.152M (128K x 9)
Speed
20ns
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Density
1.125Mb
Access Time (max)
20ns
Sync/async
Asynchronous
Architecture
Not Required
Clock Freq (max)
Not RequiredMHz
Operating Supply Voltage (typ)
3.3V
Address Bus
17b
Package Type
TQFP
Operating Temp Range
-40C to 85C
Number Of Ports
2
Supply Current
195mA
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
100
Word Size
9b
Number Of Words
128K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CY7C019V-20AXI
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Document #: 38-06044 Rev. *C
Electrical Characteristics
Capacitance
AC Test Loads and Waveforms
Notes:
OUTPUT
V
V
V
V
I
I
I
I
I
I
I
C
C
8. f
9. Tested initially and after any design or process changes that may affect these parameters.
Parameter
IX
OZ
CC
SB1
SB2
SB3
SB4
OH
OL
IH
IL
IN
OUT
C = 30 pF
standby I
(a) Normal Load (Load 1)
MAX
= 1/t
Parameter
SB3
RC
= All inputs cycling at f = 1/t
.
Output HIGH Voltage (V
Output LOW Voltage (V
Input HIGH Voltage
Input LOW Voltage
Input Leakage Current
Output Leakage Current
Operating Current (V
I
Standby Current (Both Ports TTL Level)
CE
Standby Current (One Port TTL Level)
CE
Standby Current (Both Ports CMOS
Level) CE
Standby Current (One Port CMOS Level)
CE
OUT
[9]
L
L
L
& CE
| CE
| CE
= 0 mA) Outputs Disabled
R
R
L
R
3.3V
≥ V
≥ V
& CE
≥ V
R1 = 590Ω
R2 = 435Ω
Input Capacitance
Output Capacitance
IH
IH
IH
, f = f
, f = f
R
, f = f
Description
≥ V
Over the Operating Range
RC
CC
MAX
MAX
CC
MAX
Description
(except output enable). f=0 means no address or control lines change. This applies only to inputs at CMOS level
CC
=Max.
CC
− 0.2V, f = 0
[8]
GND
3.0V
= Min., I
= Min., I
≤
OUTPUT
3 ns
(b) Thévenin Equivalent (Load 1)
10%
C = 30 pF
OH
OH
= +4.0 mA)
= –4.0 mA) 2.4
ALL INPUT PULSES
Com’l.
Com’l.
Com’l.
Com’l.
Com’l.
Ind.
Ind.
Ind.
Ind.
Ind.
90%
T
V
A
CC
[7]
[7]
[7]
[7]
[7]
= 25
R
= 3.3V
TH
Min. Typ. Max. Min. Typ. Max. Min. Typ. Max.
–10
2.2
°
= 250Ω
–5
Test Conditions
C, f = 1 MHz,
125
-15
35
80
10
75
90%
V
TH
10%
185
120
250
105
0.4
0.8
10
50
5
= 1.4V
≤
3 ns
CY7C008V/009V
CY7C018V/019V
–10
2.4
2.2
–5
OUTPUT
120
140
-20
35
45
75
85
10
10
70
80
C = 5 pF
(c) Three-State Delay (Load 2)
(Used for t
including scope and jig)
175
195
110
120
250
250
105
0.4
0.8
10
45
55
95
Max.
5
CY7C008V/009V
CY7C018V/019V
10
10
–10
2.4
2.2
–5
LZ
, t
HZ
115
-25
30
65
10
60
, t
3.3V
HZWE,
Page 5 of 18
R1 = 590Ω
R2 = 435Ω
165
250
Unit
0.4
0.8
10
40
95
80
pF
pF
5
& t
LZWE
Unit
mA
mA
mA
mA
mA
mA
mA
mA
µA
µA
µA
µA
V
V
V
V
[+] Feedback