CY7C019V-25AXC Cypress Semiconductor Corp, CY7C019V-25AXC Datasheet
CY7C019V-25AXC
Specifications of CY7C019V-25AXC
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CY7C019V-25AXC Summary of contents
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... CY7C008V CY7C018V CY7C009V CY7C019V 3.3V 64K/128K x 8/9 Dual-Port Static RAM Features • True Dual-Ported memory cells which allow simulta- neous access of the same memory location • 64K x 8 organization (CY7C008) • 128K x 8 organization (CY7C009) • 64K x 9 organization (CY7C018) • 128K x 9 organization (CY7C019) • ...
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... Two ports are provided permitting independent, asynchronous access for reads and writes to any location in memory. The devices can be utilized as standalone 8/9-bit dual-port static RAMs or multiple devices can be combined in order to function as a 16/18-bit or wider master/slave dual-port static RAM ...
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... Typical Standby Current for I SB1 (Both ports TTL level) Typical Standby Current for I SB3 (Both ports CMOS level) Note: 5. This pin is NC for CY7C018V. Document #: 38-06044 Rev. *C 100-Pin TQFP (Top View CY7C019V (128K x 9) CY7C018V (64K CY7C008V/009V CY7C008V/009V CY7C018V/019V CY7C018V/019V -15 - 125 ...
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... Supply Voltage to Ground Potential ............... –0.5V to +4.6V DC Voltage Applied to Outputs in High Z State............................–0. Notes: 6. The Voltage on any input or I/O pin cannot exceed the power pin during power-up. 7. Industrial parts are available in CY7C009V and CY7C019V only. Document #: 38-06044 Rev. *C Description Chip Enable (CE is LOW when CE Read/Write Enable ...
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Electrical Characteristics Over the Operating Range Parameter Description V Output HIGH Voltage ( Output LOW Voltage ( Input HIGH Voltage IH V Input LOW Voltage IL I Input Leakage Current IX I Output Leakage ...
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Switching Characteristics Over the Operating Range Parameter Description READ CYCLE t Read Cycle Time RC t Address to Data Valid AA t Output Hold From Address Change OHA [11 LOW to Data Valid ACE t OE LOW to ...
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Switching Characteristics Over the Operating Range Parameter Description t R/W HIGH after BUSY HIGH (Slave) WH [17] t BUSY HIGH to Data Valid BDD [16] INTERRUPT TIMING t INT Set Time INS t INT Reset Time INR SEMAPHORE TIMING t ...
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Switching Waveforms Read Cycle No.1 (Either Port Address Access) ADDRESS OHA DATA OUT PREVIOUS DATA VALID Read Cycle No.2 (Either Port CE/OE Access DATA OUT CURRENT I SB [19, 21, 22, 23] ...
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Switching Waveforms (continued) Write Cycle No. 1: R/W Controlled Timing ADDRESS OE [28 R/W NOTE 30 DATA OUT DATA IN Write Cycle No Controlled Timing ADDRESS [28 R/W DATA IN Notes: 24. ...
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Switching Waveforms (continued) Semaphore Read After Write Timing, Either Side A –A VALID ADRESS SEM I R/W OE Timing Diagram of Semaphore Contention A – R/W L SEM L A –A ...
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Switching Waveforms (continued) Timing Diagram of Read with BUSY (M/S=HIGH) ADDRESS R R/W R DATA ADDRESS L BUSY L DATA OUTL Write Timing with Busy Input (M/S=LOW) R/W BUSY Note: 36 LOW. ...
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Switching Waveforms (continued) Busy Timing Diagram No. 1 (CE Arbitration) CE Valid First: L ADDRESS L BUSY R CE Valid First: R ADDRESS L BUSY L Busy Timing Diagram No. 2 (Address ...
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Switching Waveforms (continued) Interrupt Timing Diagrams Left Side Sets INT : R ADDRESS WRITE FFFF (1FFFF for CY7C009V/19V R/W L INT R [39] t INS Right Side Clears INT : R ADDRESS R/W R ...
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... HIGH during SEM LOW). A semaphore address. OE and R/W are used in the same manner as a normal memory access. When writing or reading a semaphore, the other address pins have no effect. When writing to the semaphore, only I/O written to the left port of an available semaphore, a one will appear at the same semaphore address on the right port ...
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If both ports attempt to access the semaphore within t of each other, the semaphore will SPS Table 1. Non-Contending Read/Write Inputs CE R/W OE ...
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... Ordering Code 15 CY7C019V-15AC CY7C019V-15AXC 20 CY7C019V-20AC CY7C019V-20AXC CY7C019V-20AI CY7C019V-20AXI 25 CY7C019V-25AC CY7C019V-25AXC Document #: 38-06044 Rev. *C Package Name Package Type A100 100-Pin Thin Quad Flat Pack A100 100-Pin Thin Quad Flat Pack A100 100-Pin Thin Quad Flat Pack A100 100-Pin Pb-Free Thin Quad Flat Pack ...
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... Document #: 38-06044 Rev. *C © Cypress Semiconductor Corporation, 2005. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress ...
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... Document #: 38-06044 Rev. *C Description of Change Change from Spec number: 38-00669 to 38-06044 Change pin 85 from BUSYL to BUSYR (pg. 3) Power up requirements added to Maximum Ratings Information Added Pb-Free Logo Added Pb-Free parts to ordering information: CY7C008V-25AXC, CY7C009V-15AXC, CY7C009V-20AXI, CY7C009V-25AXC, CY7C019V-15AXC, CY7C019V-20AXC, CY7C019V-20AXI, CY7C019V-25AXC CY7C008V/009V CY7C018V/019V Page [+] Feedback ...