CY7C144AV-25AXC Cypress Semiconductor Corp, CY7C144AV-25AXC Datasheet - Page 14

• Manufacturer Part Number: CY7C144AV-25AXC
• Description: IC SRAM 64KBIT 25NS 64LQFP
• Manufacturer: Cypress Semiconductor Corp
• Type: Asynchronousr

Specifications of CY7C144AV-25AXC

• Memory Size: 64K (8K x 8)
• Package / Case: 64-LQFP
• Format - Memory: RAM
• Memory Type: SRAM - Dual Port, Asynchronous
• Speed: 25ns
• Interface: Parallel
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Access Time: 25 ns
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Maximum Operating Current: 165 mA
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Number Of Ports: 2
• Operating Supply Voltage: 3.3 V
• Memory Configuration: 8K X 8
• Supply Voltage Range: 3V To 3.6V
• Memory Case Style: TQFP
• No. Of Pins: 100
• Operating Temperature Range: 0°C To +70°C
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 428-2156; CY7C144AV-25AXC

Switching Waveforms
Busy Timing Diagram No. 2 (Address Arbitration)
Left Address Valid First
Document #: 38-06051 Rev. *C
Busy Timing Diagram No. 1 (CE Arbitration)
CE
CE
Right Address Valid First:
Note:
42. If t
L
ADDRESS
ADDRESS
R
Valid First:
ADDRESS
ADDRESS
Valid First:
ADDRESS
ADDRESS
PS
is violated, the busy signal will be asserted on one side or the other, but there is no guarantee to which side BUSY will be asserted.
BUSY
BUSY
BUSY
BUSY
CE
CE
CE
CE
L,R
L,R
R
R
R
L
R
L
L
L
R
R
L
L
(continued)
t
t
PS
PS
ADDRESS MATCH
ADDRESS MATCH
t
t
RC
RC
or t
or t
t
t
PS
PS
WC
WC
t
t
[42]
BLA
BLA
ADDRESS MATCH
ADDRESS MATCH
[42]
t
t
BLC
BLC
ADDRESS MISMATCH
ADDRESS MISMATCH
t
t
BHA
BHA
t
t
CY7C138AV/144AV/006AV
CY7C139AV/145AV/016AV
BHC
BHC
CY7C007AV/017AV
Page 14 of 20
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