IS42S16400F-7TLI ISSI, Integrated Silicon Solution Inc, IS42S16400F-7TLI Datasheet - Page 23
![IC SDRAM 64MBIT 143MHZ 54TSOP](/photos/7/26/72654/is42s16400f-7tli_sml.jpg)
IS42S16400F-7TLI
Manufacturer Part Number
IS42S16400F-7TLI
Description
IC SDRAM 64MBIT 143MHZ 54TSOP
Manufacturer
ISSI, Integrated Silicon Solution Inc
Type
SDRAMr
Specifications of IS42S16400F-7TLI
Format - Memory
RAM
Memory Type
SDRAM
Memory Size
64M (4M x 16)
Speed
143MHz
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
54-TSOP II
Organization
4Mx16
Density
64Mb
Address Bus
14b
Access Time (max)
6/5.4ns
Maximum Clock Rate
143MHz
Operating Supply Voltage (typ)
3.3V
Package Type
TSOP-II
Operating Temp Range
-40C to 85C
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Supply Current
110mA
Pin Count
54
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Data Bus Width
16 bit
Maximum Clock Frequency
143 MHz
Access Time
6 ns, 5.4 ns
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Maximum Operating Current
110 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
706-1078
IS42S16400F-7TLI
IS42S16400F-7TLI
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IS42S16400F
IS45S16400F
diagram for each possible CAS latency; data element n +
3 is either the last of a burst of four or the last desired of
a longer burst. Following the PRECHARGE command, a
subsequent command to the same bank cannot be issued
until t
hidden during the access of the last data element(s).
In the case of a fixed-length burst being executed to
completion, a PRECHARGE command issued at the
optimum time (as described above) provides the same
operation that would result from the same fixed-length
burst with auto precharge. The disadvantage of the PRE-
CHARGE command is that it requires that the command
and address buses be available at the appropriate time to
issue the command; the advantage of the PRECHARGE
command is that it can be used to truncate fixed-length
or full-page bursts.
CAS Latency
Integrated Silicon Solution, Inc. — www.issi.com
Rev. H
07/28/2010
rp
is met. Note that part of the row precharge time is
COMMAND
COMMAND
CLK
CLK
DQ
DQ
READ
READ
T0
T0
CAS Latency - 2
NOP
NOP
CAS Latency - 3
T1
T1
t
LZ
t
AC
Full-page READ bursts can be truncated with the BURST
TERMINATE command, and fixed-length READ bursts
may be truncated with a BURST TERMINATE command,
provided that auto precharge was not activated.The BURST
TERMINATE command should be issued x cycles before
the clock edge at which the last desired data element is
valid, where x equals the CAS latency minus one. This is
shown in the READ Burst Termination diagram for each
possible CAS latency; data element n + 3 is the last desired
data element of a longer burst.
NOP
NOP
T2
T2
D
OUT
t
t
OH
LZ
t
AC
NOP
T3
T3
D
DON'T CARE
UNDEFINED
OUT
t
OH
T4
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