CY7C1520AV18-200BZXI Cypress Semiconductor Corp, CY7C1520AV18-200BZXI Datasheet - Page 27

• Manufacturer Part Number: CY7C1520AV18-200BZXI
• Description: IC SRAM 72MBIT 200MHZ 165TFBGA
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C1520AV18-200BZXI

• Format - Memory: RAM
• Memory Type: SRAM - Synchronous, DDR II
• Memory Size: 72M (2M x 36)
• Speed: 200MHz
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 1.9 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 165-TFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Document History Page
Document Number: 001-06982 Rev. *F
Revision
Document Title: CY7C1518AV18/CY7C1520AV18, 72-Mbit DDR-II SRAM Two-Word Burst Architecture
Document Number: 001-06982
*C
*D
*A
*B
*E
*F
**
1523443
2509299
2880098
2957481
433241
462002
503690
ECN
VKN/AESA
VKN/AESA
VKN/AESA
Change
Orig. of
NXR
NXR
VKN
VKN
Submission
06/21/2010
See ECN
See ECN
See ECN
See ECN
See ECN
02/17/10
Date
Description of Change
New Datasheet
Changed t
t
AC Switching Characteristics table
Modified Power-up waveform
Minor change: Moved datasheet to web
Converted from preliminary to final
Updated Logic Block diagram
Updated I
Changed DLL minimum operating frequency from 80MHz to 120MHz
Changed t
Modified footnotes 20 and 28
Changed Ambient Temperature with Power Applied from “–10°C to +85°C” to
“–55°C to +125°C” in the “Maximum Ratings“ on page 20
Updated Power-up sequence waveform and it’s description
Added footnote #19 related to I
Changed Θ
Removed x8 and x9 part number details
Included Soft Error Immunity Data
Modified Ordering Information table by including parts that are available and
modified the disclaimer for the Ordering information
Updated package outline diagram.
Included “CY7C1520AV18-200BZI” in the Ordering Information table
Added
TDIH
, t
CH
Acronyms
from 10 ns to 5 ns and changed t
DD
TH
CYC
JC
/I
and t
SB
spec from 2.3 to 2.1, Changed JTAG ID [31:29] from 001 to 000.
max spec to 8.4ns
specs
and
TL
from 40 ns to 20 ns, changed t
Ordering Code Definitions
DD
, Changed Θ
TDOV
JA
from 20 ns to 10 ns in TAP
spec from 16.2 to 16.3,
CY7C1518AV18
CY7C1520AV18
TMSS
, t
TDIS
Page 27 of 28
, t
CS
, t
TMSH
,
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