M48Z12-150PC1 STMicroelectronics, M48Z12-150PC1 Datasheet - Page 10

• Manufacturer Part Number: M48Z12-150PC1
• Description: IC NVSRAM 16KBIT 150NS 24DIP
• Manufacturer: STMicroelectronics

Specifications of M48Z12-150PC1

• Format - Memory: RAM
• Memory Type: NVSRAM (Non-Volatile SRAM)
• Memory Size: 16K (2K x 8)
• Speed: 150ns
• Interface: Parallel
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 24-DIP (600 mil) Module
• Data Bus Width: 8 bit
• Organization: 2 Kb x 8
• Interface Type: Parallel
• Access Time: 150 ns
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.5 V
• Operating Current: 80 mA
• Maximum Operating Temperature: 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: Through Hole
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-2870-5

Operation modes
Table 4.
1. Valid for ambient operating temperature: T
2.3
Note:
10/22
Symbol
noted).
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
WLWH
WHQX
WHAX
DVWH
WHDX
WLQZ
AVWH
AVWL
EHAX
DVEH
EHDX
AVEH
ELEH
AVAV
AVEL
WRITE mode AC characteristics
Data retention mode
With valid V
RAM. Should the supply voltage decay, the RAM will automatically power-fail deselect, write
protecting itself when V
become high impedance, and all inputs are treated as “don't care.”
A power failure during a WRITE cycle may corrupt data at the currently addressed location,
but does not jeopardize the rest of the RAM's content. At voltages below V
user can be assured the memory will be in a write protected state, provided the V
is not less than t
into the deselect window during the time the device is sampling V
of the power supply lines is recommended.
The power switching circuit connects external V
when V
too low, an internal Battery Not OK (BOK) flag will be set. The BOK flag can be checked
after power up. If the BOK flag is set, the first WRITE attempted will be blocked. The flag is
automatically cleared after the first WRITE, and normal RAM operation resumes.
on page 11
For more information on a battery storage life refer to the application note AN1012.
WRITE cycle time
Address valid to WRITE enable low
Address valid to chip enable 1 low
WRITE enable pulse width
Chip enable low to chip enable 1 high
WRITE enable high to address transition
Chip enable high to address transition
Input valid to WRITE enable high
Input valid to chip enable high
WRITE enable high to input transition
Chip enable high to input transition
WRITE enable low to output Hi-Z
Address valid to WRITE enable high
Address valid to chip enable high
WRITE enable high to output transition
CC
rises above V
CC
illustrates how a BOK check routine could be structured.
applied, the M48Z02/12 operates as a conventional BYTEWIDE™ static
Parameter
F
. The M48Z02/12 may respond to transient noise spikes on V
CC
A
SO
= 0 to 70 °C or –40 to 85 °C; V
(1)
falls within the V
. As V
Doc ID 2420 Rev 8
CC
rises, the battery voltage is checked. If the voltage is
PFD
Min
70
50
55
30
30
60
60
0
0
0
0
5
5
5
(max), V
CC
–70
CC
to the RAM and disconnects the battery
Max
25
= 4.75 to 5.5 V or 4.5 to 5.5 V (except where
M48Z02/M48Z12
PFD
Min
150
120
120
90
90
10
10
40
40
10
0
0
5
5
(min) window. All outputs
–150
Max
50
CC
. Therefore, decoupling
Min
200
120
120
140
140
10
10
60
60
10
0
0
5
5
M48Z02, M48Z12
PFD
–200
Max
CC
(min), the
60
CC
that reach
Figure 7
fall time
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns