CY7C1339G-133AXC Cypress Semiconductor Corp, CY7C1339G-133AXC Datasheet
CY7C1339G-133AXC
Specifications of CY7C1339G-133AXC
CY7C1339G-133AXC
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CY7C1339G-133AXC Summary of contents
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... Document Number: 38-05520 Rev. *I 4-Mbit (128 K × 32) Pipelined Sync SRAM Functional Description The CY7C1339G SRAM integrates 128 K × 32 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered clock input (CLK) ...
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... Read Cycle Timing .................................................... 12 Write Cycle Timing .................................................... 13 Read/Write Cycle Timing ........................................... 14 ZZ Mode Timing ........................................................ 15 Ordering Information ...................................................... 16 Ordering Code Definitions ......................................... 16 Package Diagrams .......................................................... 17 Acronyms ........................................................................ 19 Document Conventions ................................................. 19 Units of Measure ....................................................... 19 Document History Page ................................................. 20 Sales, Solutions, and Legal Information ...................... 21 Worldwide Sales and Design Support ....................... 21 Products .................................................................... 21 PSoC Solutions ......................................................... 21 CY7C1339G Page [+] Feedback ...
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... BYTE SSQ V 27 DDQ Document Number: 38-05520 Rev. *I 250 MHz 200 MHz 166 MHz 2.6 2.8 325 265 40 40 100-pin TQFP Pinout CY7C1339G CY7C1339G 133 MHz Unit 3.5 4.0 ns 240 225 DDQ V SSQ DQ B BYTE SSQ V DDQ DDQ V SSQ BYTE SSQ ...
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... DQ BW ADV CLK BWE MODE NC/72M Description to select/deselect the device. ADSP is ignored select/deselect the device sampled only when a new external address select/deselect the device sampled only when a new external address CY7C1339G DDQ A NC/9M NC/576M A A NC/ DDQ DDQ DDQ NC/36M DDQ , CE , and CE are sampled active ...
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... CO device). The CY7C1339G supports secondary cache in systems utilizing either a linear or interleaved burst sequence. The interleaved burst order supports Pentium and i486™ processors. The linear burst sequence is suited for processors that utilize a linear burst sequence ...
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... Bytes not selected during a byte write operation will remain unaltered. A synchronous self-timed Write mechanism has been provided to simplify the Write operations. Because the CY7C1339G is a common I/O device, the output enable (OE) must be deserted HIGH before presenting data to the DQs inputs. Doing so will tri-state the output drivers safety precaution, DQs are automatically tri-stated whenever a write cycle is detected, regardless of the state of OE ...
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... and BWE = WRITE = H when all byte write enable signals and CE 1 CY7C1339G Min Max Unit – – CYC 2t – ns CYC – CYC 0 – ns ADV WRITE OE CLK L-H Tri-state L-H Tri-state L-H Tri-state L-H Tri-state L-H Tri-state Tri-state L L-H Tri-state L L L-H ...
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... Write all bytes Notes 8.X = “Don't Care.” Logic HIGH Logic LOW. 9.Table only lists a partial listing of the byte write combinations. Any combination of BW Document Number: 38-05520 Rev BWE valid. Appropriate write will be done based on which byte write is active. X CY7C1339G Page [+] Feedback ...
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... All speeds ≤ 0 > V – 0 DDQ /2), undershoot: V (AC) > –2 V (Pulse width less than t CYC IL (min) within 200 ms. During this time V < V and CY7C1339G + 0 Ambient DDQ Temperature 0 °C to +70 °C 3.3 V – 2.5 V – 10 –40 °C to +85 °C –40 °C to +125 °C ...
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... DDQ GND 351 Ω INCLUDING JIG AND SCOPE ( 1667 Ω 2 DDQ DDQ GND GND 1538 Ω INCLUDING INCLUDING JIG AND JIG AND (b) (b) SCOPE SCOPE CY7C1339G Min Max – 105 – 95 – 85 – 75 – 45 TQFP BGA Unit Package Package TQFP BGA ...
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... V and t is less than t to eliminate bus contention between SRAMs when sharing the same OELZ CHZ CLZ = 2.5 V. DDQ CY7C1339G –166 –133 Unit Max Min Max Min Max – 1 – ...
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... OEV OEHZ t OELZ t DOH Q(A2 BURST READ DON’T CARE UNDEFINED is HIGH and CE is LOW. When CE is HIGH CY7C1339G A3 Burst continued with new base address Deselect cycle t CHZ Q( Q(A2) Q( Burst wraps around to its initial state is HIGH LOW HIGH ...
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... ADSC extends burst A2 t WES t WEH ADV suspends burst D(A2 BURST WRITE DON’T CARE UNDEFINED is HIGH and CE is LOW. When CE is HIGH LOW. [A:D] CY7C1339G t ADS t ADH A3 t WES t WEH t t ADVH ADVS D( D(A3 Extended BURST WRITE is HIGH LOW HIGH. ...
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... The data bus (Q) remains in high Z following a WRITE cycle, unless a new read access is initiated by ADSP or ADSC. 24 HIGH. Document Number: 38-05520 Rev WES t WEH OELZ D(A3) Q(A4) Q(A4+1) Single WRITE BURST READ DON’T CARE UNDEFINED is HIGH and CE is LOW. When CE is HIGH CY7C1339G A5 A6 D(A5) D(A6) Q(A4+2) Q(A4+3) Back-to-Back WRITEs is HIGH LOW HIGH Page [+] Feedback ...
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... Device must be deselected when entering ZZ mode. See Cycle Descriptions table for all possible signal conditions to deselect the device. 26. DQs are in high Z when exiting ZZ sleep mode. Document Number: 38-05520 Rev ZZI I DDZZ High-Z DON’T CARE CY7C1339G t ZZREC t RZZI DESELECT or READ Only Page [+] Feedback ...
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... Cypress maintains a worldwide network of offices, solution centers, manufacturer's representatives and distributors. To find the office closest to you, visit us at http://www.cypress.com/go/datasheet/offices. Speed Package Ordering Code (MHz) Diagram 133 CY7C1339G-133AXC 51-85050 100-pin Thin Quad Flat Pack (14 × 20 × 1.4 mm) Pb-free Ordering Code Definitions CY7C 1339 G - 133 AX X Document Number: 38-05520 Rev. *I www.cypress.com ...
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... Package Diagrams Document Number: 38-05520 Rev. *I 100-pin TQFP (14 × 20 × 1.4 mm), 51-85050 CY7C1339G 51-85050 *C Page [+] Feedback ...
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... Package Diagrams (continued) 119-ball BGA (14 × 22 × 2.4 mm), 51-85115 Document Number: 38-05520 Rev. *I CY7C1339G 51-85115 *C Page [+] Feedback ...
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... TQFP thin quad flat pack WE write enable Document Number: 38-05520 Rev. *I Document Conventions Units of Measure Symbol Unit of Measure ns nano seconds V Volts µA micro Amperes mA milli Amperes ms milli seconds MHz Mega Hertz pF pico Farad W Watts °C degree Celcius CY7C1339G Page [+] Feedback ...
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... Document History Page Document Title: CY7C1339G 4-Mbit (128 K × 32) Pipelined Sync SRAM Document Number: 38-05520 Orig. of REV. ECN NO. Issue Date Change ** 224368 See ECN RKF *A 288909 See ECN VBL *B 332895 See ECN SYT *C 351194 See ECN PCI *D 366728 See ECN PCI ...
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... Cypress against all charges. Use may be limited by and subject to the applicable Cypress software license agreement. Document Number: 38-05520 Rev. *I All products and company names mentioned in this document may be the trademarks of their respective holders. cypress.com/go/plc Revised October 8, 2010 CY7C1339G PSoC Solutions psoc.cypress.com/solutions PSoC 1 | PSoC 3 ...