CY62148EV30LL-45ZSXI Cypress Semiconductor Corp, CY62148EV30LL-45ZSXI Datasheet

IC SRAM 4MBIT 45NS 32TSOP

CY62148EV30LL-45ZSXI

Manufacturer Part Number
CY62148EV30LL-45ZSXI
Description
IC SRAM 4MBIT 45NS 32TSOP
Manufacturer
Cypress Semiconductor Corp
Type
Asynchronousr
Datasheet

Specifications of CY62148EV30LL-45ZSXI

Memory Size
4M (512K x 8)
Package / Case
32-TSOP II
Format - Memory
RAM
Memory Type
SRAM
Speed
45ns
Interface
Parallel
Voltage - Supply
2.2 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Access Time
45 ns
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.2 V
Maximum Operating Current
20 mA
Organization
512 K x 8
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Number Of Ports
1
Operating Supply Voltage
3 V
Memory Configuration
512K X 8
Supply Voltage Range
2.2V To 3.6V
Memory Case Style
TSOP
No. Of Pins
44
Operating Temperature Range
-40°C To +85°C
Rohs Compliant
Yes
Density
4Mb
Access Time (max)
45ns
Sync/async
Asynchronous
Architecture
Not Required
Clock Freq (max)
Not RequiredMHz
Operating Supply Voltage (typ)
2.5/3.3V
Address Bus
19b
Package Type
TSOP-II
Operating Temp Range
-40C to 85C
Supply Current
20mA
Operating Supply Voltage (min)
2.2V
Operating Supply Voltage (max)
3.6V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
32
Word Size
8b
Number Of Words
512K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
428-2076
CY62148EV30LL-45ZSXI

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY62148EV30LL-45ZSXI
Manufacturer:
CYPRESS
Quantity:
117 000
Part Number:
CY62148EV30LL-45ZSXI
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
Part Number:
CY62148EV30LL-45ZSXIT
Manufacturer:
TI
Quantity:
15
Part Number:
CY62148EV30LL-45ZSXIT
Manufacturer:
CYPRESS
Quantity:
455
Part Number:
CY62148EV30LL-45ZSXIT
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
Part Number:
CY62148EV30LL-45ZSXIT
0
Features
Note
Cypress Semiconductor Corporation
Document #: 38-05576 Rev. *K
1. SOIC package is available only in 55 ns speed bin.
Logic Block Diagram
Very high speed: 45 ns
Temperature range:
Pin compatible with CY62148DV30
Ultra low standby power
Ultra low active power
Easy memory expansion with CE and OE features
Automatic power down when deselected
Complementary metal oxide semiconductor (CMOS) for
optimum speed and power
Available in Pb-free 36-ball very fine ball grid array (VFBGA),
32-pin thin small outline pacage (TSOP) II, and 32-pin small
outline integrated circuit (SOIC)
Wide voltage range: 2.20 V to 3.60 V
Industrial: –40 °C to +85 °C
Automotive-A: –40 °C to +85 °C
Typical standby current: 1 A
Maximum standby current: 7 A (Industrial)
Typical active current: 2 mA at f = 1 MHz
WE
OE
CE
A 0
A 1
A 2
A 3
A 4
A 5
A 6
A 7
A 8
A 9
A 10
A 11
A 12
[1]
packages
COLUMN DECODER
198 Champion Court
INPUT BUFFER
512K x 8
ARRAY
POWER
DOWN
Functional Description
The CY62148EV30 is a high performance CMOS static RAM
organized as 512 K words by 8 bits. This device features
advanced circuit design to provide ultra low active current. This
is ideal for providing More Battery Life™ (MoBL
applications such as cellular telephones. The device also has an
automatic power down feature that significantly reduces power
consumption. Placing the device into standby mode reduces
power consumption by more than 99 percent when deselected
(CE HIGH). The eight input and output pins (I/O
are placed in a high impedance state when the device is
deselected (CE HIGH), the outputs are disabled (OE HIGH), or
during a write operation (CE LOW and WE LOW).
To write to the device, take Chip Enable (CE) and Write Enable
(WE) inputs LOW. Data on the eight I/O pins (I/O
is then written into the location specified on the address pins (A
through A
To read from the device, take Chip Enable (CE) and Output
Enable (OE) LOW while forcing Write Enable (WE) HIGH. Under
these conditions, the contents of the memory location specified
by the address pins appear on the I/O pins.
For best practice recommendations, refer to the Cypress
application note
4-Mbit (512 K × 8) Static RAM
18
San Jose
).
AN1064, SRAM System
,
CA 95134-1709
CY62148EV30 MoBL
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
IO 0
IO 1
IO 2
IO 3
IO 4
IO 5
IO 6
IO 7
0
1
2
3
4
5
6
7
Revised December 14, 2010
Guidelines.
0
0
) in portable
through I/O
408-943-2600
through I/O
®
7
7
)
0
)
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CY62148EV30LL-45ZSXI Summary of contents

Page 1

... Note 1. SOIC package is available only speed bin. Cypress Semiconductor Corporation Document #: 38-05576 Rev. *K 4-Mbit (512 K × 8) Static RAM Functional Description The CY62148EV30 is a high performance CMOS static RAM organized as 512 K words by 8 bits. This device features advanced circuit design to provide ultra low active current. This is ideal for providing More Battery Life™ ...

Page 2

Contents Features ............................................................................. 1 Functional Description ..................................................... 1 Pin Configuration ............................................................. 3 Product Portfolio .............................................................. 3 Maximum Ratings ............................................................. 4 Operating Range ............................................................... 4 Electrical Characteristics ................................................. 4 Capacitance ....................................................................... 5 Data Retention Characteristics ........................................ 5 Switching Characteristics ................................................ 6 ...

Page 3

... Product Portfolio Product Range VFBGA Industrial CY62148EV30LL TSOP II Industrial/Auto-A SOIC Industrial Notes 2. SOIC package is available only speed bin pins are not connected on the die. 4. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at V Document #: 38-05576 Rev. *K ...

Page 4

Maximum Ratings Exceeding maximum ratings may impair the useful life of the device. These user guidelines are not tested. Storage temperature................................. –65 °C to +150 °C Ambient temperature with power applied ............................................. 55 °C to +125 °C Supply voltage to ...

Page 5

Capacitance [12] (For All packages) Parameter Description C Input capacitance IN C Output capacitance OUT Thermal Resistance [12] Parameter Description  Thermal resistance JA (Junction to ambient)  Thermal resistance JC (Junction to case OUTPUT R2 30 ...

Page 6

... HZOE HZCE HZWE 21. The internal write time of the memory is defined by the overlap of WE write by going INACTIVE. The data input setup and hold timing must be referenced to the edge of the signal that terminates the write. Document #: 38-05576 Rev. *K -45 (Industrial/Auto-A) ...

Page 7

Switching Waveforms Figure 3. Read Cycle No. 1 (Address Transition Controlled) ADDRESS DATA OUT PREVIOUS DATA VALID Figure 4. Read Cycle No. 2 (OE Controlled) ADDRESS CE t ACE OE t LZOE HIGH IMPEDANCE DATA OUT t LZCE t V ...

Page 8

Switching Waveforms (continued) Figure 6. Write Cycle No. 2 (CE Controlled) ADDRESS CE WE DATA I/O Figure 7. Write Cycle No. 3 (WE Controlled, OE LOW) ADDRESS NOTE 33 DATA I/O t HZWE Truth Table [34] ...

Page 9

... Ordering Information Speed Ordering Code (ns) 45 CY62148EV30LL-45BVI CY62148EV30LL-45BVXI CY62148EV30LL-45ZSXI CY62148EV30LL-45ZSXA 55 CY62148EV30LL-55SXI Contact your local Cypress sales representative for availability of these parts. Ordering Code Definitions E V30 LL -xx xxx 621 Document #: 38-05576 Rev. *K Package Package Type Diagram 51-85149 36-ball VFBGA 51-85149 36-ball VFBGA (Pb-free) ...

Page 10

Package Diagrams Figure 8. 36-ball VFBGA ( mm), 51-85149 Document #: 38-05576 Rev. *K ® CY62148EV30 MoBL 51-85149 *D Page [+] Feedback ...

Page 11

Package Diagrams (continued) Document #: 38-05576 Rev. *K Figure 9. 32-pin TSOP II, 51-85095 ® CY62148EV30 MoBL 51-85095-*A Page [+] Feedback ...

Page 12

Package Diagrams (continued) Figure 10. 32-pin (450 MIL) Molded SOIC, 51-85081 Document #: 38-05576 Rev. *K ® CY62148EV30 MoBL 51-85081-*C Page [+] Feedback ...

Page 13

... BLE byte low enable CMOS complementary metal oxide semiconductor CE chip enable I/O input/output OE output enable SRAM static random access memory TSOP thin small outline package VFBGA very fine ball grid array WE write enable Document Conventions Units of Measure Symbol Unit of Measure ns ...

Page 14

... DOE Changed Ordering Information to include Pb-Free Packages ZSD Changed from Preliminary information to Final Changed the address of Cypress Semiconductor Corporation on Page #1 from “3901 North First Street” to “198 Champion Court” Removed 35ns Speed Bin Removed “L” version of CY62148EV30 Changed ball C3 from DNU to NC. ...

Page 15

... Cypress against all charges. Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and foreign), United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement ...

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