cy62147ev30 Cypress Semiconductor Corporation., cy62147ev30 Datasheet
cy62147ev30
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cy62147ev30 Summary of contents
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... CMOS for optimum speed and power • Offered in Pb-free 48-ball VFBGA and 44-pin TSOPII packages • Byte power down feature Functional Description [1] The CY62147EV30 is a high performance CMOS static RAM organized as 256K words by 16 bits. This device features Logic Block Diagram ...
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... Product Portfolio Product Range Min CY62147EV30LL Ind’l/Auto-A 2.2 CY62147EV30LL Auto-E 2.2 Pin Configurations The figure that follows show the 48-ball VFBGA and 44-pin TSOP II pinouts. 48-Ball VFBGA Top View BLE BHE ...
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... Tested initially and after any design or process changes that may affect these parameters. Document #: 38-05440 Rev. *E Output Current into Outputs (LOW) ............................ 20 mA Static Discharge Voltage .......................................... >2001V (MIL-STD-883, Method 3015) Latch up Current...................................................... >200 mA Operating Range Device + 0.3V) CCmax CY62147EV30LL Ind’l/Auto-A –40°C to +85°C + 0.3V) CCmax + 0.3V) CCmax 45 ns (Ind’l/Auto-A) [2] Min Typ 2.0 > ...
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... Figure 2. Data Retention Waveform DATA RETENTION MODE V V > 1.5V CC(min CDR > 100 µs or stable at V > 100 µ CC(min) CC(min) ® CY62147EV30 MoBL VFBGA TSOP II Unit Package Package °C °C 90% 10% Fall Time = 1 V/ns Unit Ω Ω Ω V ...
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... Test Loads and Waveforms” on page less than less than less than t LZCE HZBE LZBE HZOE , BHE, BLE, or both = V IL ® CY62147EV30 MoBL 55 ns (Auto-E) Unit Min Max ...
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... Address valid before or similar to CE and BHE, BLE transition LOW. Document #: 38-05440 Rev. *E [17, 18] Figure 3. Read Cycle No OHA Figure 4. Read Cycle No DOE DATA VALID 50% , BHE, BLE, or both = ® CY62147EV30 MoBL DATA VALID HZCE t HZOE t HZBE HIGH IMPEDANCE Page [+] Feedback ...
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... Document #: 38-05440 Rev. *E Figure 5. Write Cycle No SCE PWE DATA IN Figure 6. Write Cycle No SCE PWE DATA IN , the output remains in a high impedance state. ® CY62147EV30 MoBL Page [+] Feedback ...
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... DATA IO Document #: 38-05440 Rev. *E [21] Figure 7. Write Cycle No SCE PWE t SD DATA IN HZWE [21] Figure 8. Write Cycle No SCE PWE t HZWE t SD DATA IN ® CY62147EV30 MoBL LZWE LZWE Page [+] Feedback ...
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... Very Fine Pitch Ball Grid Array (Pb-free) 51-85087 44-pin Thin Small Outline Package II (Pb-free) 51-85150 48-ball Very Fine Pitch Ball Grid Array (Pb-free) 51-85087 44-pin Thin Small Outline Package II (Pb-free) ® CY62147EV30 MoBL Power Standby ( Standby ( Active (I ...
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... Figure 9. 48-Ball VFBGA ( mm), 51-85150 TOP VIEW A1 CORNER 6.00±0.10 SEATING PLANE C Document #: 38-05440 Rev. *E CY62147EV30 MoBL BOTTOM VIEW A1 CORNER Ø0. Ø0. Ø0.30±0.05(48X 1.875 A 0.75 3 ...
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... The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Figure 10. 44-Pin TSOP II, 51-85087 ® CY62147EV30 MoBL 51-85087-*A Page [+] Feedback ...
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... Changed from Preliminary information to Final Changed the address of Cypress Semiconductor Corporation on Page #1 from “3901 North First Street” to “198 Champion Court” Removed 35ns Speed Bin Removed “L” version of CY62147EV30 Changed ball E3 from DNU to NC. Removed redundant foot note on DNU. Changed I (Max) value from ...