CY7C1011DV33-10ZSXI Cypress Semiconductor Corp, CY7C1011DV33-10ZSXI Datasheet - Page 9

• Manufacturer Part Number: CY7C1011DV33-10ZSXI
• Description: IC SRAM 2MBIT 10NS 44TSOP
• Manufacturer: Cypress Semiconductor Corp
• Type: Asynchronousr

Specifications of CY7C1011DV33-10ZSXI

• Memory Size: 2M (128K x 16)
• Package / Case: 44-TSOP II
• Format - Memory: RAM
• Memory Type: SRAM - Asynchronous
• Speed: 10ns
• Interface: Parallel
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Access Time: 10 ns
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Maximum Operating Current: 90 mA
• Organization: 128 K x 16
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Number Of Ports: 1
• Operating Supply Voltage: 3.3 V
• Memory Configuration: 128K X 16
• Supply Voltage Range: 3V To 3.6V
• Memory Case Style: TSOP
• No. Of Pins: 44
• Operating Temperature Range: -40°C To +85°C
• Rohs Compliant: Yes
• Density: 2Mb
• Access Time (max): 10ns
• Sync/async: Asynchronous
• Architecture: Not Required
• Clock Freq (max): Not RequiredMHz
• Operating Supply Voltage (typ): 3.3V
• Address Bus: 17b
• Package Type: TSOP-II
• Operating Temp Range: -40C to 85C
• Supply Current: 90mA
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 44
• Word Size: 16b
• Number Of Words: 128K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 428-1962; CY7C1011DV33-10ZSXI

Switching Waveforms
Write Cycle No. 3 (WE Controlled, OE HIGH During Write)
Write Cycle No. 4 (WE Controlled, OE LOW)
Document Number: 38-05609 Rev. *E
Notes
21. Data I/O is high-impedance if OE or BHE and/or BLE = V
22. If CE goes HIGH simultaneously with WE going HIGH, the output remains in a high-impedance state.
23. During this period the I/Os are in the output state and input signals should not be applied.
ADDRESS
BHE, BLE
DATA I/O
DATA I/O
BHE, BLE
ADDRESS
BHE, BLE
CE
CE
WE
WE
OE
NOTE 23
t
SA
(continued)
t
SA
t
HZOE
NOTE
23
IH
.
t
t
AW
AW
t
t
SCE
SCE
t
t
BW
t
t
WC
HZWE
WC
[21, 22]
DATA
t
t
PWE
SD
t
PWE
IN
VALID
t
SD
t
HD
t
HA
t
LZWE
t
t
HD
HA
CY7C1011DV33
Page 9 of 14
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