CY7C109D-10ZXI Cypress Semiconductor Corp, CY7C109D-10ZXI Datasheet

IC SRAM 1MBIT 10NS 32TSOP

CY7C109D-10ZXI

Manufacturer Part Number
CY7C109D-10ZXI
Description
IC SRAM 1MBIT 10NS 32TSOP
Manufacturer
Cypress Semiconductor Corp
Type
Asynchronousr
Datasheet

Specifications of CY7C109D-10ZXI

Memory Size
1M (128K x 8)
Package / Case
32-TSOP I
Format - Memory
RAM
Memory Type
SRAM - Asynchronous
Speed
10ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Access Time
10 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Maximum Operating Current
80 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Number Of Ports
1
Operating Supply Voltage
5 V
Density
1Mb
Access Time (max)
10ns
Sync/async
Asynchronous
Architecture
Not Required
Clock Freq (max)
Not RequiredMHz
Operating Supply Voltage (typ)
5V
Address Bus
17b
Package Type
TSOP-I
Operating Temp Range
-40C to 85C
Supply Current
80mA
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
32
Word Size
8b
Number Of Words
128K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
428-2011
Cypress Semiconductor Corporation
Document #: 38-05468 Rev. *F
Features
Logic Block Diagram
Note
1. For guidelines on SRAM system design, please refer to the ‘System Design Guidelines’ Cypress application note, available on the internet at www.cypress.com.
• Pin- and function-compatible with CY7C109B/CY7C1009B
• High speed
• Low active power
• Low CMOS standby power
• 2.0V Data Retention
• Automatic power-down when deselected
• TTL-compatible inputs and outputs
• Easy memory expansion with CE
• CY7C109D available in Pb-free 32-pin 400-Mil wide Molded
— t
— I
— I
SOJ and 32-pin TSOP I packages. CY7C1009D available
in Pb-free 32-pin 300-Mil wide Molded SOJ package
AA
CC
SB2
= 10 ns
= 80 mA @ 10 ns
= 3 mA
CE 1
CE 2
WE
OE
A 0
A 1
A 2
A 3
A 4
A 5
A 6
A 7
A 8
1
, CE
2
and OE options
COLUMN DECODER
198 Champion Court
INPUT BUFFER
128K x 8
ARRAY
POWER
DOWN
Functional Description
The CY7C109D/CY7C1009D is a high-performance CMOS
static RAM organized as 131,072 words by 8 bits. Easy
memory expansion is provided by an active LOW Chip Enable
(CE
Output Enable (OE), and tri-state drivers.The eight input and
output pins (IO
state when:
Write to the device by taking Chip Enable One (CE
Enable (WE) inputs LOW and Chip Enable Two (CE
HIGH. Data on the eight IO pins (IO
written into the location specified on the address pins (A
through A
Read from the device by taking Chip Enable One (CE
Output Enable (OE) LOW while forcing Write Enable (WE) and
Chip Enable Two (CE
contents of the memory location specified by the address pins
appears on the IO pins.
• Deselected (CE
• Outputs are disabled (OE HIGH),
• When the write operation is active (CE
and WE LOW)
1-Mbit (128K x 8) Static RAM
1
), an active HIGH Chip Enable (CE
16
San Jose
).
0
through IO
1
,
HIGH or CE
CA 95134-1709
2
) HIGH. Under these conditions, the
7
) are placed in a high-impedance
[1]
IO 0
IO 1
IO 2
IO 3
IO 4
IO 5
IO 6
IO 7
2
Revised December 8, 2010
LOW),
0
through IO
CY7C1009D
1
2
), an active LOW
LOW, CE
CY7C109D
408-943-2600
1
) and Write
7
) is then
2
2
HIGH,
) input
1
) and
0
[+] Feedback

Related parts for CY7C109D-10ZXI

CY7C109D-10ZXI Summary of contents

Page 1

... Data Retention • Automatic power-down when deselected • TTL-compatible inputs and outputs • Easy memory expansion with • CY7C109D available in Pb-free 32-pin 400-Mil wide Molded SOJ and 32-pin TSOP I packages. CY7C1009D available in Pb-free 32-pin 300-Mil wide Molded SOJ package Logic Block Diagram ...

Page 2

... Top View V CC (not to scale Selection Guide Maximum Access Time Maximum Operating Current Maximum CMOS Standby Current Note 2. NC pins are not connected on the die. Document #: 38-05468 Rev. *F SOJ Top View GND GND 16 CY7C109D-10 CY7C1009D- CY7C109D CY7C1009D Unit Page [+] Feedback ...

Page 3

... MHz 1/t max RC 66 MHz 40 MHz Max > < > < max Max > V – 0.3V < 0.3V > V – 0.3V < 0.3V CY7C109D CY7C1009D [3] ............................... –0. 0.5V CC Ambient V Speed CC Temperature 5V  0. 7C109D-10 7C1009D-10 Unit Min Max 2.4 V 0 –0.5 0.8 V A –1 +1 A – ...

Page 4

... Still Air, soldered × 4.5 inch, four-layer printed circuit board [5] 3.0V 30 pF* GND 3 ns Rise Time: High-Z characteristics: R1 480 5V OUTPUT 255 INCLUDING JIG AND SCOPE (c) CY7C109D CY7C1009D Max Unit 300-Mil 400-Mil TSOP I Unit Wide SOJ Wide SOJ 57.61 56.29 50.72 °C/W 40.53 38 ...

Page 5

... HIGH to Write End 2 values until the first memory access can be performed CC “AC Test Loads and Waveforms is less than less than t , and t HZCE LZCE HZOE LZOE HZWE LOW, CE HIGH, and WE LOW and t HZWE CY7C109D CY7C1009D 7C109D-10 7C1009D-10 Unit Min Max s 100 ...

Page 6

... CE < 0.3V > V – 0. < 0. DATA RETENTION MODE 4.5V V > CDR [14, 15 OHA DOE DATA VALID 50% > 50 s or stable at V > 50  CC(min) CC(min transition HIGH. 2 CY7C109D CY7C1009D Min Max Unit 2 4. DATA VALID t HZOE t HZCE HIGH IMPEDANCE 50 Page [+] Feedback ...

Page 7

... LOW simultaneously with WE going HIGH, the output remains in a high-impedance state 19. During this period the IOs are in the output state and input signals should not be applied. Document #: 38-05468 Rev. *F [17, 18 SCE t SCE PWE t SD DATA VALID [17, 18 SCE t SCE PWE t SD DATA VALID IN CY7C109D CY7C1009D Page [+] Feedback ...

Page 8

... NOTE 19 t HZWE Truth Table High High Data Out Data High Z Document #: 38-05468 Rev. *F [12, 18 SCE t SCE PWE t SD DATA VALID IO –IO Mode 0 7 Power-down Power-down Read Write Selected, Outputs Disabled CY7C109D CY7C1009D LZWE Power Standby ( Standby ( Active ( Active ( Active ( Page [+] Feedback ...

Page 9

... Ordering Information Speed Ordering Code (ns) 10 CY7C109D-10VXI CY7C109D-10ZXI CY7C1009D-10VXI Ordering Code Definitions xx9 Please contact your local Cypress sales representative for availability of these parts. Document #: 38-05468 Rev. *F Package Package Type Diagram 51-85033 32-pin (400-Mil) Molded SOJ (Pb-free) 51-85056 32-pin TSOP Type I (Pb-free) ...

Page 10

... Package Diagrams Figure 1. 32-pin (300-Mil) Molded SOJ, 51-85041 Figure 2. 32-pin (400-Mil) Molded SOJ, 51-85033 Document #: 38-05468 Rev. *F CY7C109D CY7C1009D 51-85041 *B 51-85033 *C Page [+] Feedback ...

Page 11

... Package Diagrams (continued) Figure 3. 32-pin Thin Small Outline Package Type I (8 × 20 mm), 51-85056 All product and company names mentioned in this document may be the trademarks of their respective holders. Document #: 38-05468 Rev. *F CY7C109D CY7C1009D 51-85056 *E Page [+] Feedback ...

Page 12

... Document History Page Document Title: CY7C109D/CY7C1009D, 1-Mbit (128K x 8) Static RAM Document Number: 38-05468 Orig. of REV. ECN NO. Issue Date Change ** 201560 See ECN *A 233722 See ECN *B 262950 See ECN *C See ECN See ECN *D 560995 See ECN *E 802877 See ECN *F 3104943 12/08/2010 Document #: 38-05468 Rev. *F © ...

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