W25Q80BVDAIG Winbond Electronics, W25Q80BVDAIG Datasheet - Page 43

• Manufacturer Part Number: W25Q80BVDAIG
• Description: SPI FLASH 8MBIT 8-DIP
• Manufacturer: Winbond Electronics

Specifications of W25Q80BVDAIG

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 8M (1M x 8)
• Speed: 104MHz
• Interface: SPI Serial
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-DIP (0.300", 7.62mm)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

9.2.25
The Block Erase instruction sets all memory within a specified block (64K-bytes) to the erased state of all
1s (FFh). A Write Enable instruction must be executed before the device will accept the Block Erase
Instruction (Status Register bit WEL must equal 1). The instruction is initiated by driving the /CS pin low
and shifting the instruction code “D8h” followed a 24-bit block address (A23-A0) (see Figure 2). The Block
Erase instruction sequence is shown in figure 23.
The /CS pin must be driven high after the eighth bit of the last byte has been latched. If this is not done
the Block Erase instruction will not be executed. After /CS is driven high, the self-timed Block Erase
instruction will commence for a time duration of t
is in progress, the Read Status Register instruction may still be accessed for checking the status of the
BUSY bit. The BUSY bit is a 1 during the Block Erase cycle and becomes a 0 when the cycle is finished
and the device is ready to accept other instructions again. After the Block Erase cycle has finished the
Write Enable Latch (WEL) bit in the Status Register is cleared to 0. The Block Erase instruction will not be
executed if the addressed page is protected by the Block Protect (CMP, SEC, TB, BP2, BP1, and BP0)
bits (see Status Register Memory Protection table).
64KB Block Erase (D8h)
(IO
(IO
CLK
/CS
DO
DI
0
1
)
)
Mode 3
Mode 0
*
= MSB
Figure 23. 64KB Block Erase Instruction Sequence Diagram
0
1
Instruction (D8h)
2
3
4
High Impedance
BE
- 43 -
5
(See AC Characteristics). While the Block Erase cycle
6
7
23
*
8
22
Publication Release Date: October 06, 2010
24-Bit Address
9
2
29
1
30
0
31
W25Q80BV
Mode 3
Mode 0
Revision D