M95512-RMN6TP STMicroelectronics, M95512-RMN6TP Datasheet - Page 26
![IC EEPROM 512KBIT 2MHZ 8SOIC](/photos/1/38/13851/497-8-soic_sml.jpg)
M95512-RMN6TP
Manufacturer Part Number
M95512-RMN6TP
Description
IC EEPROM 512KBIT 2MHZ 8SOIC
Manufacturer
STMicroelectronics
Specifications of M95512-RMN6TP
Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
512K (64K x 8)
Speed
2MHz
Interface
SPI, 3-Wire Serial
Voltage - Supply
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
Density
512Kb
Interface Type
Serial (SPI)
Organization
64Kx8
Access Time (max)
150ns
Frequency (max)
2MHz
Write Protection
Yes
Data Retention
40Year
Operating Supply Voltage (typ)
2.5/3.3/5V
Operating Temp Range
-40C to 85C
Supply Current
3mA
Operating Supply Voltage (min)
1.8V
Operating Supply Voltage (max)
5.5V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-6356-2
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
M95512-RMN6TP
Manufacturer:
TDK
Quantity:
324
Instructions
6.7
Figure 15. Read Identification Page sequence
26/48
Read Identification Page (available only in M95512-DR
devices)
The Identification Page (128 bytes) is an additional page which can be written and (later)
permanently locked in Read-only mode.
Reading this page is achieved with the Read Identification Page instruction (see
The Chip Select signal (S) is first driven low, the bits of the instruction byte and address
bytes are then shifted in, on Serial Data input (D). Address bit A10 must be 0, address bits
[A15:A11] and [A9:A7] are Don't Care, and the data byte pointed to by [A6:A0] is shifted out
on Serial Data output (Q).
If Chip Select (S) continues to be driven low, the internal address register is automatically
incremented, and the byte of data at the new address is shifted out. The number of bytes to
read in the ID page must not exceed the page boundary (e.g.: when reading the ID page
from location 90d, the number of bytes should be less than or equal to 38d, as the ID page
boundary is 128 bytes).
The read cycle is terminated by driving Chip Select (S) high. The rising edge of the Chip
Select (S) signal can occur at any time during the cycle. The first byte addressed can be any
byte within any page.
The instruction is not accepted, and is not executed, if a write cycle is currently in progress.
Doc ID 11124 Rev 14
M95512-DR, M95512-W, M95512-R
Table
4).