IS42S32200E-7BLI ISSI, Integrated Silicon Solution Inc, IS42S32200E-7BLI Datasheet - Page 36

• Manufacturer Part Number: IS42S32200E-7BLI
• Description: IC SDRAM 64MBIT 143MHZ 90BGA
• Manufacturer: ISSI, Integrated Silicon Solution Inc
• Type: SDRAMr

Specifications of IS42S32200E-7BLI

• Format - Memory: RAM
• Memory Type: SDRAM
• Memory Size: 64M (2Mx32)
• Speed: 143MHz
• Interface: Parallel
• Voltage - Supply: 3.15 V ~ 3.45 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 90-BGA
• Organization: 2Mx32
• Density: 64Mb
• Address Bus: 13b
• Access Time (max): 8/5.5ns
• Maximum Clock Rate: 143MHz
• Operating Supply Voltage (typ): 3.3V
• Package Type: TFBGA
• Operating Temp Range: -40C to 85C
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Supply Current: 140mA
• Pin Count: 90
• Mounting: Surface Mount
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 706-1080; IS42S32200E-7BLI

IS42S32200E, IS45S32200E
AC ELECTRICAL CHARACTERISTICS
Notes:
1. An initial pause of 100us is required after power up, followed by two AUTO REFRESH commands, before proper device opera-
2. measured with t
3. The reference level is 1.5V when measuring input signal timing. Rise/fall times are measured between V
4. Access time is measured at 1.5V with the load shown in the figure that follows.
5. The time t
6. CLK must be toggled a minimum of two times during this period.
36
Symbol Parameter
t
t
t
t
t
t
t
t
dpl3
dpl2
dal3
dal2
t
wr
xsr
ref
tion is ensured. (V
AUTO REFRESH command wake-ups should be repeated anytime the t
when the output is in the high impedance state.
Input Data To Precharge
Command Delay time
Input Data To Active / Refresh CAS Latency = 3
Command Delay time (During Auto-Precharge)
Transition Time
Write Recovery Time
Exit Self Refresh to Active Time
Refresh Cycle Time (4096)
hz
(max.) is defined as the time required for the output voltage to transition by ± 200 mV from V
t
= 0.5 ns.
dd
and V
(2)
ddq
must be powered up simultaneously. GND and GNDQ must be at same potential.) The two
(6)
Condition
CAS Latency = 3
CAS Latency = 2
CAS Latency = 2
T
T
T
a
a
a
≤ 70
≤ 85
> 85
o
o
o
C
C
C
Com, Ind, —
Ind,A1,A2 —
(1,2,3)
A1, A2
A2
1CLK+5ns —
2CLK+t
2CLK+t
2CLK
2CLK
Min.
0.3
60
—
rp
rp
-5
Max.
1.2
64
—
—
—
—
—
—
—
Integrated Silicon Solution, Inc. — www.issi.com
ref
1CLK+6ns —
2CLK+t
2CLK+t
2CLK
2CLK
Min.
refresh requirement is exceeded.
0.3
66
—
—
—
rp
rp
-6
Max.
1.2
64
64
—
—
—
—
—
—
1CLK+7ns —
2CLK+t
2CLK+t
2CLK
2CLK
Min.
0.3
77
—
—
—
rp
rp
-7
Max.
1.2
64
64
16
—
—
—
—
—
ih
oh
1CLK+7.5ns —
(min.) and V
2CLK+t
(min.) or V
2CLK
Min. Max. Units
0.3
—
—
75
—
—
—
-75E
rp
1.2
64
64
—
—
—
—
—
—
ol
il
07/12/2010
(max.).
(max.)
ms
ms
ms
t
ns
ns
ns
ns
ns
ns
Rev. D
ck