IS43R16160B-5TL ISSI, Integrated Silicon Solution Inc, IS43R16160B-5TL Datasheet - Page 8

• Manufacturer Part Number: IS43R16160B-5TL
• Description: IC DDR SDRAM 256MBIT 66TSOP
• Manufacturer: ISSI, Integrated Silicon Solution Inc
• Type: SDRAMr

Specifications of IS43R16160B-5TL

• Format - Memory: RAM
• Memory Type: DDR SDRAM
• Memory Size: 256M (16Mx16)
• Speed: 200MHz
• Interface: Parallel
• Voltage - Supply: 2.5 V ~ 2.7 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 66-TSOPII
• Organization: 16Mx16
• Density: 256Mb
• Address Bus: 15b
• Access Time (max): 700ps
• Maximum Clock Rate: 200MHz
• Operating Supply Voltage (typ): 2.5V
• Package Type: TSOP-II
• Operating Temp Range: 0C to 70C
• Operating Supply Voltage (max): 2.7V
• Operating Supply Voltage (min): 2.3V
• Pin Count: 66
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 200 MHz
• Access Time: 0.7 ns
• Supply Voltage (max): 2.7 V
• Supply Voltage (min): 2.3 V
• Maximum Operating Current: 290 mA
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant
• Other names: 706-1085; IS43R16160B-5TL

IS43R83200B, IS46R83200B
IS43R16160B, IS46R16160B
8
DDR SDRAM (Rev.1.1)
I
I
COMMAND TRUTH TABLE
H=High Level, L=Low Level, V=Valid, X=Don't Care, n=CLK cycle number
Single Bank Precharge
Column Address Entry
Column Address Entry
Column Address Entry
Column Address Entry
Row Address Entry &
NOTE:
1. Applies only to read bursts with autoprecharge disabled; this command is undefined (and should not be used) for
2. BA0-BA1 select either the Base or the Extended Mode Register (BA0 = 0, BA1 = 0 selects Mode Register;BA0=1 ,
Precharge All Banks
Self-Refresh Entry
Mode Register Set
Auto-Precharge
Self-Refresh Exit
read bursts with autoprecharge enabled, and for write bursts.
BA1 = 0 selects Extended Mode Register; other combinations of BA0-BA1 are reserved; A0-A12 provide the
op-code to be written to the selected Mode Register.
Burst Terminate
Auto-Precharge
Bank Activate
No Operation
& Write with
Auto-Refresh
COMMAND
& Read with
Deselect
& Read
& Write
Preliminary
Preliminary
MNEMONIC
WRITEA
READA
REFSX
DESEL
WRITE
PREA
READ
REFA
REFS
TERM
NOP
ACT
PRE
MRS
CKE
n-1
H
H
H
H
H
H
H
H
H
H
H
L
L
H
H
CKE
X
X
H
H
H
H
H
H
H
H
L
H
H
H
H
n
256M Double Data Rate Synchronous DRAM
/CS
H
L
L
L
L
L
L
L
L
L
L
H
L
L
L
/RAS
X
H
L
L
L
H
H
H
H
L
L
X
H
H
L
/CAS
X
H
H
H
H
L
L
L
L
L
L
X
H
H
L
Zentel Electronics Corporation
/WE BA0,1
A3S56D30/40ETP
X
H
H
L
L
L
L
H
H
H
H
X
H
L
L
Integrated Silicon Solution, Inc.
X
X
V
V
X
V
V
V
V
X
X
X
X
X
L
A10
/AP
X
X
V
L
H
L
H
L
H
X
X
X
X
X
L
A0-9,
11-12
X
X
V
X
X
V
V
V
V
X
X
X
X
X
V
note
08/13/2010
1
2
Rev. E