70T3539MS166BC IDT, 70T3539MS166BC Datasheet - Page 20

• Manufacturer Part Number: 70T3539MS166BC
• Description: SRAM 512K X 36 STD-PWR, 2.5V DUAL PORT RAM
• Manufacturer: IDT

Specifications of 70T3539MS166BC

• Part # Aliases: IDT70T3539MS166BC

IDT70T3539M
High-Speed 2.5V 512K x 36 Dual-Port Synchronous Static RAM
DATA
R/W
OE
OUT
Timing Waveform - Entering Sleep Mode
Timing Waveform - Exiting Sleep Mode
NOTES:
1. CE
2. All timing is same for Left and Right ports.
3. CE
4. CE
5. The device must be in Read Mode (R/W High) when exiting sleep mode. Outputs are active but data is not valid until the following cycle.
R/W
1 =
0
0
has to be deactivated (CE
has to be deactivated (CE
V
IH.
(4)
0
0
= V
= V
IH
IH
) three cycles prior to asserting ZZ (ZZx = V
) one cycle prior to de-asserting ZZ (ZZx = V
(5)
6.42
20
(3)
An
IH
IL
(1,2)
Industrial and Commercial Temperature Ranges
) and held for two cycles after asserting ZZ (ZZx = V
) and held for three cycles after de-asserting ZZ (ZZx = V
(1,2)
(5)
An+1
Dn
Dn+1
IH
).
IL
).