IS61LV5128AL-10TLI ISSI, Integrated Silicon Solution Inc, IS61LV5128AL-10TLI Datasheet - Page 8

• Manufacturer Part Number: IS61LV5128AL-10TLI
• Description: IC SRAM 4MBIT 10NS 44TSOP
• Manufacturer: ISSI, Integrated Silicon Solution Inc
• Type: Asynchronousr

Specifications of IS61LV5128AL-10TLI

• Memory Size: 4M (512K x 8)
• Package / Case: 44-TSOP II
• Interface: Parallel
• Format - Memory: RAM
• Memory Type: SRAM - Asynchronous
• Speed: 10ns
• Voltage - Supply: 3.135 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Access Time: 10 ns
• Supply Voltage (max): 3.63 V
• Supply Voltage (min): 3.135 V
• Maximum Operating Current: 95 mA
• Organization: 512 K x 8
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Number Of Ports: 1
• Operating Supply Voltage: 3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 706-1038

WRITE CYCLE NO. 3
IS61LV5128AL
WRITE CYCLE NO. 2
8
Notes:
1. The internal write time is defined by the overlap of CE LOW and WE LOW. All signals must be in valid states to initiate a Write, but
2. I/O will assume the High-Z state if OE > V
any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling edge of
the signal that terminates the Write.
ADDRESS
ADDRESS
D
D
OUT
OUT
WE
WE
D
D
OE
OE
CE
CE
IN
IN
LOW
LOW
LOW
t
SA
(1,2)
(WE Controlled: OE is LOW During Write Cycle)
t
DATA UNDEFINED
DATA UNDEFINED
SA
(WE Controlled: OE is HIGH During Write Cycle)
IH
.
Integrated Silicon Solution, Inc. — www.issi.com —
VALID ADDRESS
t
t
t
t
AW
AW
HZWE
HZWE
VALID ADDRESS
t
t
PWE1
WC
t
t
PWE2
WC
HIGH-Z
HIGH-Z
t
t
SD
SD
DATA
DATA
IN
IN
VALID
VALID
t
t
HD
HD
t
t
LZWE
LZWE
t
t
HA
HA
CE_WR2.eps
ISSI
CE_WR3.eps
1-800-379-4774
04/15/05
Rev. C
®