P5020NSE1VNB Freescale Semiconductor, P5020NSE1VNB Datasheet - Page 27

• Manufacturer Part Number: P5020NSE1VNB
• Description: Processors - Application Specialized Std Tmp Enc2000/1333
• Manufacturer: Freescale Semiconductor

Specifications of P5020NSE1VNB

• Rohs: yes

SD_RX03
SD_RX02
SD_RX01
SD_RX00
SD_REF_CLK1
SD_REF_CLK1
SD_REF_CLK2
SD_REF_CLK2
SD_REF_CLK3
SD_REF_CLK3
GPIO00
GPIO01
GPIO02
GPIO03
GPIO04/USB1_DRVVBUS
GPIO05/USB1_PWRFAULT
GPIO06/USB2_DRVVBUS
GPIO07/USB2_PWRFAULT
GPIO08/UART1_SOUT
GPIO09/UART2_SOUT
GPIO10/UART1_SIN
GPIO11/UART2_SIN
GPIO12/UART1_RTS/UART3_SOUT
GPIO13/UART2_RTS/UART4_SOUT
GPIO14/UART1_CTS/UART3_SIN
GPIO15/UART2_CTS/UART4_SIN
GPIO16/IIC3_SCL/SDHC_CD
GPIO17/IIC3_SDA/SDHC_WP
GPIO18/DMA1_DREQ0
Freescale Semiconductor
Signal
P5020/P5010 QorIQ Integrated Processor Hardware Specifications, Rev. 0
Table 1. Pins Listed by Bus (continued)
General-Purpose Input/Output
General Purpose Input / Output
General Purpose Input / Output
General Purpose Input / Output
General Purpose Input / Output
General Purpose Input / Output
General Purpose Input / Output
General Purpose Input / Output
General Purpose Input / Output
General Purpose Input / Output
General Purpose Input / Output
General Purpose Input / Output
General Purpose Input / Output
General Purpose Input / Output
General Purpose Input / Output
General Purpose Input / Output
Receive Data (negative)
Receive Data (negative)
Receive Data (negative)
Receive Data (negative)
SerDes Bank 1 PLL Reference
Clock
SerDes Bank 1 PLL Reference
Clock Complement
SerDes Bank 2 PLL Reference
Clock
SerDes Bank 2 PLL Reference
Clock Complement
SerDes Bank 3 PLL Reference
Clock
SerDes Bank 3 PLL Reference
Clock Complement
General Purpose Input / Output
General Purpose Input / Output
General Purpose Input / Output
General Purpose Input / Output
Signal Description
Pin Number
Package
Pin Assignments and Reset States
AM20
AM22
AM14
AC32
AC31
AN20
AH21
AG20
AR23
AN23
AH23
AL21
AK22
AK21
AL22
AK23
AP22
AK13
AP21
AJ21
AJ22
D30
D28
B31
B29
A35
B35
V34
V33
Type
Pin
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
I
I
I
I
I
I
I
I
I
Supply
Power
XV
XV
XV
XV
XV
XV
XV
XV
XV
XV
OV
OV
OV
OV
OV
OV
OV
OV
OV
OV
OV
OV
OV
OV
OV
OV
OV
OV
OV
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
Notes
27
27
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27