MCIMX6D7CVT08AC Freescale Semiconductor, MCIMX6D7CVT08AC Datasheet - Page 94

• Manufacturer Part Number: MCIMX6D7CVT08AC
• Description: Processors - Application Specialized i.MX6D
• Manufacturer: Freescale Semiconductor
• Type: Multimedia Applicationsr

Specifications of MCIMX6D7CVT08AC

• Rohs: yes
• Core: ARM Cortex A9
• Processor Series: i.MX6
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 800 MHz
• Data Ram Size: 16 KB
• Maximum Operating Temperature: + 105
• Mounting Style: SMD/SMT
• Package / Case: FCBGA
• Interface Type: I2C, I2S, UART, USB
• Memory Type: L1/L2 Cache, ROM, SRAM
• Minimum Operating Temperature: - 40 C
• Number Of Timers: 2

1
Electrical Characteristics
4.11.10.1 IPU Sensor Interface Signal Mapping
The IPU supports a number of sensor input formats.
Pins used for various supported interface formats.
94
IPUx_CSIx_
DATA00
IPUx_CSIx_
DATA01
IPUx_CSIx_
DATA02
IPUx_CSIx_
DATA03
IPUx_CSIx_
DATA04
IPU2_CSIx_
DATA_05
IPUx_CSIx_
DATA06
IPUx_CSIx_
DATA07
IPUx_CSIx_
DATA08
IPUx_CSIx_
DATA09
IPUx_CSIx_
DATA10
IPUx_CSIx_
DATA11
IPUx_CSIx_
DATA12
IPUx_CSIx_
DATA13
IPUx_CSIx_
DATA14
IPUx_CSIx_
DATA15
IPUx_CSIx_
DATA16
IPUx_CSIx_
DATA17
IPUx_CSIx_
DATA18
IPUx_CSIx_
DATA19
IPU2_CSIx stands for IPU2_CSI1 or IPU2_CSI2.
Name
Signal
1
G[0], R[2] R[2],G[3],B[2]
G[1], R[3] R[3],G[4],B[3]
G[2], R[4] R[4],G[5],B[4]
B[0], G[3]
B[1], G[4]
B[2], G[5]
B[3], R[0]
B[4], R[1]
RGB565
2 cycles
8 bits
Table 63. Camera Input Signal Cross Reference, Format, and Bits Per Cycle
—
—
—
—
—
—
—
—
—
—
—
—
i.MX 6Dual/6Quad Applications Processors for Industrial Products, Rev. 2
R[2],G[4],B[2]
R[3],G[5],B[3]
R[4],G[0],B[4]
R[0],G[1],B[0]
R[1],G[2],B[1]
RGB565
3 cycles
8 bits
—
—
—
—
—
—
—
—
—
—
—
—
2
RGB666
3 cycles
R/G/B[4]
R/G/B[5]
R/G/B[0]
R/G/B[1]
R/G/B[2]
R/G/B[3]
R/G/B[4]
R/G/B[5]
8 bits
—
—
—
—
—
—
—
—
—
—
—
—
3
RGB888
3 cycles
R/G/B[0]
R/G/B[1]
R/G/B[2]
R/G/B[3]
R/G/B[4]
R/G/B[5]
R/G/B[6]
R/G/B[7]
8 bits
—
—
—
—
—
—
—
—
—
—
—
—
Table 63
2 cycles
YCbCr
Y/C[0]
Y/C[1]
Y/C[2]
Y/C[3]
Y/C[4]
Y/C[5]
Y/C[6]
Y/C[7]
8 bits
—
—
—
—
—
—
—
—
—
—
—
—
defines the mapping of the Sensor Interface
4
RGB565
2 cycles
16 bits
G[0]
G[1]
G[2]
G[3]
G[4]
G[5]
B[0]
B[1]
B[2]
B[3]
B[4]
R[0]
R[1]
R[2]
R[3]
R[4]
—
—
—
—
5
YCbCr
1 cycle
16 bits
C[0]
C[1]
C[2]
C[3]
C[4]
C[5]
C[6]
C[7]
Y[0]
Y[1]
Y[2]
Y[3]
Y[4]
Y[5]
Y[6]
Y[7]
—
—
—
—
6
Freescale Semiconductor
YCbCr
1 cycle
16 bits
C[0]
C[1]
C[2]
C[3]
C[4]
C[5]
C[6]
C[7]
Y[0]
Y[1]
Y[2]
Y[3]
Y[4]
Y[5]
Y[6]
Y[7]
0
0
0
0
7
YCbCr
1 cycle
20 bits
C[0]
C[1]
C[2]
C[3]
C[4]
C[5]
C[6]
C[7]
C[8]
C[9]
Y[0]
Y[1]
Y[2]
Y[3]
Y[4]
Y[5]
Y[6]
Y[7]
Y[8]
Y[9]
8