MAX1366ECM-T Maxim Integrated, MAX1366ECM-T Datasheet - Page 6
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MAX1366ECM-T
Manufacturer Part Number
MAX1366ECM-T
Description
LED Display Drivers
Manufacturer
Maxim Integrated
Datasheet
1.MAX1368ECM-T.pdf
(36 pages)
Specifications of MAX1366ECM-T
Mounting Style
SMD/SMT
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Microcontroller-Interface, 4.5-/3.5-Digit Panel
Meters with 4–20mA Output
6
ELECTRICAL CHARACTERISTICS (continued)
(AV
reference), V
noted. All specifications are at T
(A
V
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
Note 6:
Note 7:
Note 8:
Note 9:
Note 10: Power-supply currents are measured with all digital inputs at either GND or DV
Note 11: All input signals are specified with t
Note 12: See the serial-interface timing diagrams (Figures 7–11).
CS Rise to DOUT Disable
CS Fall to DOUT Enable
EXT
VDD
1000
DD
_______________________________________________________________________________________
900
800
700
600
500
400
300
200
100
= 7V, C
0
= D
= DV
2.7
Integral nonlinearity is the deviation of the analog value at any code from its theoretical value after nulling the gain error
and offset error.
Offset calibrated. See OFFSET_CAL1 AND OFFSET_CAL2 in the On-Chips Registers section.
Offset nulled.
Offset-drift error is eliminated by recalibration at the new temperature.
The input voltage range for the analog inputs is given with respect to the voltage on the negative input of the differential pair.
V
AIN+ and REF+ only. V
Measured at DC by changing the power-supply voltage from 2.7V to 5.25V and measuring the effect on the conversion
error with external reference. PSRR at 50Hz and 60Hz exceeds 120dB with filter notches at 50Hz and 60Hz
CLK and SCLK are disabled.
LED drivers are disabled.
DV
VDD
PARAMETER
AIN+
DD
3.2
REF+
DD
EXT
= +5V, V
vs. SUPPLY VOLTAGE
, unless otherwise noted.
= DAC_VDD = +2.7V to +5.25V, GND = 0, LEDG = 0, V
or V
SUPPLY CURRENT
SUPPLY VOLTAGE (V)
= 7V, V
= 0.1µF, REF- = GND, C
3.7
AV
AIN-
DD
DAC_VDD
DV
DAC_VDD
DD
= -2.2V to +2.2V. V
REG_AMP
4.2
A
4.7
= +5.0V, GND = 0, LEDG = 0, V
REF+
= T
= +5.0V, C
SYMBOL
MIN
must always be greater than V
5.2
t
t
TR
DV
to T
NEGV
REF+
MAX
RISE
REF+
= 0.1µF, RANGE bit = 1, internal clock mode. T
700
600
500
400
300
200
100
. Typical values are at T
or V
C
C
= t
0
LOAD
LOAD
-40
= 0.1µF, REF- = GND, C
FALL
REF-
SUPPLY CURRENT vs. TEMPERATURE
= 50pF, Figures 11, 12
= 50pF, Figures 11, 12
= -2.2V to +2.2V. All input structures are identical. Production tested on
= 5ns (10% to 90% of DV
-15
TEMPERATURE (°C)
CONDITIONS
DV
AV
LEDV
10
DD
DD
REF-
= +2.7V to +5.25V, V
Typical Operating Characteristics
DAC_VDD
35
A
.
LEDV
= +25°C, unless otherwise noted.)
NEGV
60
= +2.7V to +5.25V, V
DD
= 0.1µF. Internal clock mode, unless otherwise
85
) and are timed from a voltage level of 50% of
DD
and with the device in internal clock mode.
REF+
-0.01
-0.06
-0.11
-0.16
0.19
0.14
0.09
0.04
A
- V
= +25°C, unless otherwise noted.)
MIN
2.75
REF-
OFFSET ERROR vs. SUPPLY VOLTAGE
REF+
3.25
= 2.048V (external reference),
TYP
- V
SUPPLY VOLTAGE (V)
3.75
REF-
MAX1366
= 2.048V (external
MAX
120
120
4.25
(Figure
4.75
UNITS
1).
ns
ns
5.25