11AA010-I/P Microchip Technology, 11AA010-I/P Datasheet - Page 14
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11AA010-I/P
Manufacturer Part Number
11AA010-I/P
Description
IC EEPROM 1KBIT 100KHZ 8DIP
Manufacturer
Microchip Technology
Specifications of 11AA010-I/P
Memory Size
1K (128 x 8)
Package / Case
8-DIP (0.300", 7.62mm)
Operating Temperature
-40°C ~ 85°C
Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Speed
100kHz
Interface
UNI/O™ (Single Wire)
Voltage - Supply
1.8 V ~ 5.5 V
Organization
128 x 8
Interface Type
Serial
Maximum Clock Frequency
100 KHz
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.8 V
Maximum Operating Current
50 uA
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
1.8 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
11AA010-I/P
Manufacturer:
MICROCHIP
Quantity:
12 000
11AAXXX/11LCXXX
4.5
The
register. The STATUS register may be read at any time,
even during a write cycle. The STATUS register is
formatted as follows:
The Write-In-Process (WIP) bit indicates whether the
11XX is busy with a write operation. When set to a ‘
a write is in progress, when set to a ‘
progress. This bit is read-only.
The Write Enable Latch (WEL) bit indicates the status
of the write enable latch. When set to a ‘
allows writes to the array, when set to a ‘
prohibits writes to the array. This bit is set and cleared
using the WREN and WRDI instructions, respectively.
This bit is read-only for any other instruction.
FIGURE 4-6:
DS22067D-page 14
Note:
X
7
Note: Bits 4-7 are don’t cares, and will read as ‘
SCIO
SCIO
RDSR
X
6
The STATUS register data can continuously be read, or polled, by transmitting a MAK in place of the NoMAK.
Read Status Register (RDSR)
Instruction
X
5
instruction provides access to the STATUS
0
4
X
Standby Pulse
0
0
BP1
Command
3
READ STATUS REGISTER COMMAND SEQUENCE
0
0
BP0
1
2
0
1
0
WEL
’, no write is in
1
1
0
’, the latch
’, the latch
0
0
STATUS Register Data
Start Header
WIP
0
1
0
0
Preliminary
’.
1
0
0
’,
1
0
0
3 2 1 0
1
The Block Protection (BP0 and BP1) bits indicate
which blocks are currently write-protected. These bits
are set by the user through the
These bits are nonvolatile.
The WIP and WEL bits will update dynamically (asyn-
chronous to issuing the
more, after the Status Register data is received, the
master can provide a MAK during the Acknowledge
sequence to request that the data be transmitted again.
This allows the master to continuously monitor the WIP
and WEL bits without the need to issue another full
command.
Once the master is finished, it provides a NoMAK to
end the operation.
0
Note: If Read Status Register command is
Note: The current drawn for a Read Status
1
initiated while the 11XX is currently
executing an internal write cycle on the
STATUS
Protection bit values will be read during
the entire command.
Register command during a write cycle
is a combination of the I
Write operating currents.
1
0
Device Address
1
register,
© 2008 Microchip Technology Inc.
0
RDSR
0
0
the
CC
instruction). Further-
0
WRSR
Read and I
0
new
instruction.
Block
CC