XRT83SH314ES Exar, XRT83SH314ES Datasheet - Page 65

• Manufacturer Part Number: XRT83SH314ES
• Description: Peripheral Drivers & Components - PCIs 14 CHT1/E1LIU SH
• Manufacturer: Exar

Specifications of XRT83SH314ES

• Product Category: Peripheral Drivers & Components - PCIs
• Rohs: yes

REV. 1.0.4
The LIU may be configured into different operating modes and have its performance monitored by software
through a standard microprocessor using data, address and control signals. These interface signals are
described below in
operate in Intel mode or Motorola mode. When the microprocessor interface is operating in Intel mode, some
of the control signals function in a manner required by the Intel 80xx family of microprocessors. Likewise, when
the microprocessor interface is operating in Motorola mode, then these control signals function in a manner as
required by the Motorola Power PC family of microprocessors. (For using a Motorola 68K asynchronous
processor, see
whose role is constant across the two modes.
microprocessor interface is operating in the Intel mode. Likewise,
when the microprocessor interface is operating in the Motorola Power PC mode.
XRT83SH314S
5.1
T
ADDR[10:8]
P
RDY_TA
WR_R/W
ADDR[7:0]
ALE_TS
µ
RD_WE
DATA[7:0]
ABLE
P
IN
PTS[2:0]
IN
N
CS
N
AME
The Microprocessor Interface Block Signals
AME
15: XRT84SH314S M
E
Figure 60
QUIVALENT
T
I/O
I
RDY
YPE
ALE
NTEL
WR
RD
I
I
I
I
Table 15
T
Microprocessor Interface Mode Select Input pins
These three pins are used to specify the microprocessor interface mode. The relationship
between the state of these three input pins, and the corresponding microprocessor mode is
presented in
Bi-Directional Data Bus for register "Read" or "Write" Operations.
Three-Bit Address Bus Inputs
The 3 MSBs of the address bits are used as a chip select decoder. The state of these 3 pins
enable the Chip Selects for additional LIU devices.
N
Eight-Bit Address Bus Inputs
The XRT83SH314S LIU microprocessor interface uses a direct address bus. This address bus
is provided to permit the user to select an on-chip register for Read/Write access.
Chip Select Input
This active low signal selects the microprocessor interface of the XRT83SH314S LIU and
enables Read/Write operations with the on-chip register locations.
P
ABLE
and
OTE
IN
,
: See the 84-Channel Application Section of this datasheet.
T
Table 21
16: I
Table 16
ICROPROCESSOR
YPE
O
I
I
I
NTEL MODE
Table 14
Address-Latch Enable: This active high signal is used to latch the contents on
the address bus ADDR[7:0]. The contents of the address bus are latched into the
ADDR[7:0] inputs on the falling edge of ALE.
Read Signal: This active low input functions as the read signal from the local
When this pin is pulled “Low” (if CS is “Low”) the LIU is informed that a read oper-
ation has been requested and begins the process of the read cycle.
Write Signal: This active low input functions as the write signal from the local
When this pin is pulled “Low” (if CS is “Low”) the LIU is informed that a write
operation has been requested and begins the process of the write cycle.
Ready Output: This active low signal is provided by the LIU device. It indicates
that the current read or write cycle is complete, and the LIU is waiting for the next
command.
)
, and
Table 15
14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
.
: M
Table 17
Table 16
I
NTERFACE
ICROPROCESSOR
lists and describes those microprocessor interface signals
M
ODES
61
. The microprocessor interface can be configured to
describes the role of some of these signals when the
S
IGNALS COMMON TO BOTH
D
ESCRIPTION
Table 17
I
NTERFACE
D
ESCRIPTION
describes the role of these signals
S
IGNALS
I
NTEL AND
XRT83SH314
M
OTOROLA
µ
µ
P.
P.