XRT83SH314ES Exar, XRT83SH314ES Datasheet - Page 24

• Manufacturer Part Number: XRT83SH314ES
• Description: Peripheral Drivers & Components - PCIs 14 CHT1/E1LIU SH
• Manufacturer: Exar

Specifications of XRT83SH314ES

• Product Category: Peripheral Drivers & Components - PCIs
• Rohs: yes

XRT83SH314
14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
The interference margin for the XRT83SH314 will be added when the first revision of silicon arrives. The test
configuration for measuring the interference margin is shown in
F
The receive path detects RLOS, AIS, QRPD and FLS. These alarms can be individually masked to prevent the
alarm from triggering an interrupt. To enable interrupt generation, the Global Interrupt Enable (GIE) bit must be
set "High" in the appropriate global register. Any time a change in status occurs (it the alarms are enabled), the
interrupt pin will pull "Low" to indicate an alarm has occurred. Once the status registers have been read, the
INT pin will return "High". The status registers are Reset Upon Read (RUR). The interrupts are categorized in
a hierarchical process block.
2.2.2
2.2.3
IGURE
E1 = PRBS 2
T1 = PRBS 2
E1 = 1,024kHz
T1 = 772kHz
W&G ANT20
9. T
Generator
Sinewave
Analyzer
Network
Interference Margin
General Alarm Detection and Interrupt Generation
EST
C
23
15
ONFIGURATION FOR
- 1
- 1
Rx
Tx
Figure 10
Cable Loss
Flat Loss
M
EASURING
is a simplified block diagram of the interrupt generation process.
I
NTERFERENCE
20
Rx
Tx
Figure
M
ARGIN
14-Channel LIU
XRT83SH314
9.
External Loopback
REV. 1.0.4