MR4A08BYS35 Everspin Technologies, MR4A08BYS35 Datasheet

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MR4A08BYS35

Manufacturer Part Number
MR4A08BYS35
Description
NVRAM 16MB 3.3V 35ns 2Mx8 Parallel MRAM
Manufacturer
Everspin Technologies
Datasheet

Specifications of MR4A08BYS35

Rohs
yes
Data Bus Width
8 bit
Memory Size
16 Mbit
Organization
2 M x 8
Interface Type
Parallel
Access Time
35 ns
Supply Voltage - Max
3.6 V
Supply Voltage - Min
3 V
Operating Current
100 mA
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Package / Case
TSOP-44
Mounting Style
SMD/SMT
Everspin Technologies
FEATURES
BENEFITS
CONTENTS
INTRODUCTION
The MR4A08B is a 16,777,216-bit magnetoresistive random access
memory (MRAM) device organized as 2,097,152 words of 8 bits.
The MR4A08B offers SRAM compatible 35ns read/write timing with
unlimited endurance. Data is always non-volatile for greater than
20-years. Data is automatically protected on power loss by low-
voltage inhibit circuitry to prevent writes with voltage out of specification. The
MR4A08B is the ideal memory solution for applications that must permanently store and retrieve critical
data and programs quickly.
The MR4A08B is available in small footprint 400-mil, 44-lead plastic small-outline TSOP type-II package or
10 mm x 10 mm, 48-pin ball grid array (BGA) package with 0.75 mm ball centers. These packages are com-
patible with similar low-power SRAM products and other non-volatile RAM products.
The MR4A08B provides highly reliable data storage over a wide range of temperatures. The product is
offered with commercial (0 to +70 °C), industrial (-40 to +85 °C), and AEC-Q100 Grade 1 (-40 to +125 °C)
operating temperature range options.
• +3.3 Volt power supply
• Fast 35 ns read/write cycle
• SRAM compatible timing
• Unlimited read & write endurance
• Data always non-volatile for >20-years at temperature
• RoHS-compliant small footprint BGA and TSOP2 packages
• AEC-Q100 Grade 1 option in TSOP2 package.
• One memory replaces FLASH, SRAM, EEPROM and BBSRAM in systems
• Improves reliability by replacing battery-backed SRAM
1. DEVICE PIN ASSIGNMENT......................................................................... 2
2. ELECTRICAL SPECIFICATIONS................................................................. 4
3. TIMING SPECIFICATIONS.......................................................................... 7
4. ORDERING INFORMATION....................................................................... 11
5. MECHANICAL DRAWING.......................................................................... 12
6. REVISION HISTORY...................................................................................... 14
for simpler, more efficient designs
How to Reach Us.......................................................................................... 14
© 2011
1
Document Number: MR4A08B Rev. 5, 9/2011
2M x 8 MRAM Memory
MR4A08B
RoHS

Related parts for MR4A08BYS35

MR4A08BYS35 Summary of contents

Page 1

... AEC-Q100 Grade 1 (-40 to +125 °C) operating temperature range options. CONTENTS 1. DEVICE PIN ASSIGNMENT......................................................................... 2 2. ELECTRICAL SPECIFICATIONS................................................................. 4 3. TIMING SPECIFICATIONS.......................................................................... 7 4. ORDERING INFORMATION....................................................................... 11 5. MECHANICAL DRAWING.......................................................................... 12 6. REVISION HISTORY...................................................................................... 14 How to Reach Us.......................................................................................... 14 Everspin Technologies © 2011 1 Document Number: MR4A08B Rev. 5, 9/2011 MR4A08B MRAM Memory RoHS ...

Page 2

... Address Input E Chip Enable W Write Enable G Output Enable DQ Data I/O V Power Supply DD V Ground Not Connect NC No Connection Everspin Technologies © 2011 Figure 1.1 Block Diagram OUTPUT ENABLE ROW COLUMN DECODER DECODER 8 SENSE AMPS BIT MEMORY ARRAY FINAL 8 WRITE DRIVERS WRITE ENABLE Table 1 ...

Page 3

... Pin TSOP2 high low don’t care 1 Hi-Z = high impedance 2 Everspin Technologies © 2011 ...

Page 4

... Permanent device damage may occur if absolute maximum ratings are exceeded. Functional opera- 1 tion should be restricted to recommended operating conditions. Exposure to excessive voltages or magnetic fields could affect device reliability. All voltages are referenced Power dissipation capability depends on package characteristics and use environment. 3 Everspin Technologies © 2011 Table 2.1 Absolute Maximum Ratings Symbol ...

Page 5

... W should hold the signals high with a power-on reset signal for longer than the startup time. During power loss or brownout where V observed when power returns above WIDD 2 ms STARTUP READ/WRITE INHIBITED Everspin Technologies © 2011 Table 2.2 Operating Conditions Symbol Min -0.5 ...

Page 6

... CMOS standby current (E ≥ 0.2 V and V ≤ max MHz) DD All active current measurements are measured with one address transition per cycle and at minimum cycle time. 1 Everspin Technologies © 2011 Table 2.3 DC Characteristics Symbol Min I - lkg( lkg(O) V ...

Page 7

... Logic input timing measurement reference level Logic output timing measurement reference level Logic input pulse levels Input rise/fall time Output load for low and high impedance parameters Output load for all other timing parameters Output Everspin Technologies © 2011 Table 3.1 Capacitance Symbol Table 3 ...

Page 8

... This parameter is sampled and not 100% tested. Transition is measured ±200 mV from the steady-state voltage (ADDRESS) Q (DATA OUT) Note: Device is continuously selected (E≤V A (ADDRESS) E (CHIP ENABLE) G (OUTPUT ENABLE) Q (DATA OUT) Everspin Technologies © 2011 Table 3.3 Read Cycle Timing Symbol t AVAV t AVQV t ...

Page 9

... This parameter is sampled and not 100% tested. Transition is measured ±200 mV from the steady-state voltage. At any given 3 voltage or temperature, t (max) < t WLQZ A (ADDRESS) E (CHIP ENABLE) W (WRITE ENABLE) D (DATA IN) Q (DATA OUT) Everspin Technologies © 2011 Table 3.4 Write Cycle Timing 1 (W Controlled) Symbol t AVAV t AVWL t AVWH ...

Page 10

... If E goes low at the same time or after W goes low, the output will remain in a high-impedance state goes high at the 3 same time or before W goes high, the output will remain in a high-impedance state. A (ADDRESS) E (CHIP ENABLE) W (WRITE ENABLE) D (DATA IN) Q (DATA OUT) Everspin Technologies © 2011 Table 3.5 Write Cycle Timing 2 (E Controlled) Symbol t AVAV t AVEL ...

Page 11

... ORDERING INFORMATION Part Number MR4A08BYS35 1 MR4A08BCYS35 1 MR4A08BMYS35 1 MR4A08BYS35R 1 MR4A08BCYS35R 1 MR4A08BMYS35R 1 MR4A08BMA35 1 MR4A08BCMA35 1 MR4A08BMA35R 1 MR4A08BCMA35R 1 Preliminary Products: These products are classified as Preliminary until the completion of all qualification tests. 1 The specifications in this data sheet are intended to be final but are subject to change. Please check the Ever- spin web site www ...

Page 12

... Dimensions and tolerances per ASME Y14.5M - 1994. 2. Dimensions in Millimeters. 3. Dimensions do not include mold protrusion. 4. Dimension does not include DAM bar protrusions. DAM Bar protrusion shall not cause the lead width to exceed 0.58. Everspin Technologies © 2011 Figure 5.1 TSOP2 Print Version Not To Scale 12 Document Number: MR4A08B Rev. 5, 9/2011 MR4A08B ...

Page 13

... Nominal A 1.19 A1 0.22 b 0.31 D 10.00 BSC E 10.00 BSC D1 5.25 BSC E1 3.75 BSC DE 0.375 BSC SE 0.375 BSC e 0.75 BSC Ref Tolerance of, from and position aaa bbb ddd eee fff Everspin Technologies © 2011 Figure 5.2 FBGA PIN A1 INDEX SEATING PLANE ø 0.35mm Max 1.27 1.35 0.27 0.32 1. 0.36 0. ...

Page 14

... Everspin Technologies was negligent regarding the design or manufacture of the part. Everspin™ and the Everspin logo are trademarks of Everspin Technologies, Inc. All other product or service names are the property of their respective owners. ...

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