DS32508-W Maxim Integrated, DS32508-W Datasheet - Page 59
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DS32508-W
Manufacturer Part Number
DS32508-W
Description
Network Controller & Processor ICs
Manufacturer
Maxim Integrated
Datasheet
1.DS32512W.pdf
(130 pages)
Specifications of DS32508-W
Part # Aliases
90-32508-W00
- Current page: 59 of 130
- Download datasheet (2Mb)
Bits 12 to 1: Port n Interrupt Status Register (PnISR). This bit is set when any of the bits in the port n interrupt
status register (PORT.ISR) are set and enabled for interrupt. When set, this bit causes an interrupt if
GLOBAL.ISRIE:PnISRIE is set. See Section 8.10.
Bit 0: Global Status Register (GSR). This bit is set when any of the latched status register bits in the global
latched status register (GLOBAL.SRL) are set and enabled for interrupt. When set, this bit causes an interrupt if
GLOBAL.ISRIE:GSRIE is set. See Section 8.10.
Bits 12 to 1: Port n Interrupt Status Register Interrupt Enable (PnISRIE). This bit is the interrupt enable for the
GLOBAL.ISR:PnISR status bit. See Section 8.10.
Bit 0: Global Status Register Interrupt Enable (GSRIE). This bit is the interrupt enable for the GLOBAL.ISR:GSR
status bit. See Section 8.10.
Register Name:
Register Description:
Register Address:
Bit #
Name
Bit #
Name
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit #
Name
Default
0 = mask the interrupt
1 = enable the interrupt
0 = mask the interrupt
1 = enable the interrupt
P7ISRIE
P7ISR
15
15
—
—
7
0
7
0
P6ISRIE
P6ISR
14
14
—
—
0
0
6
6
GLOBAL.ISR
Global Interrupt Status Register
020h
GLOBAL.ISRIE
Global Interrupt Status Register Interrupt Enable
022h
P5ISRIE
P5ISR
13
13
—
—
5
0
5
0
P12ISRIE
P4ISRIE
59 of 130
P12ISR
P4ISR
12
12
4
0
4
0
P11ISRIE
P3ISRIE
P11ISR
P3ISR
11
11
3
0
3
0
P10ISRIE
P2ISRIE
P10ISR
P2ISR
10
10
2
0
2
0
DS32506/DS32508/DS32512
P9ISRIE
P1ISRIE
P9ISR
P1ISR
9
1
9
0
1
0
P8ISRIE
GSRIE
P8ISR
GSR
8
0
8
0
0
0
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