72245LB25JI IDT, 72245LB25JI Datasheet - Page 9

• Manufacturer Part Number: 72245LB25JI
• Description: FIFO
• Manufacturer: IDT

Specifications of 72245LB25JI

• Number Of Circuits: 2
• Data Bus Width: 18 bit
• Bus Direction: Unidirectional
• Memory Size: 72 KB
• Timing Type: Synchronous
• Organization: 4 K x 18
• Maximum Clock Frequency: 40 MHz
• Access Time: 15 ns
• Supply Voltage - Max: 5.5 V
• Supply Voltage - Min: 4.5 V
• Maximum Operating Current: 60 mA
• Maximum Operating Temperature: + 85 C
• Package / Case: PLCC-64
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Part # Aliases: IDT72245LB25JI

NOTE:
1. t
NOTE:
1. t
IDT72205LB/72215LB/72225LB/72235LB/72245LB CMOS SyncFIFO
256 x 18, 512 x 18, 1,024 x 18, 2,048 x 18 and 4,096 x 18
Q
D
edge of RCLK and the rising edge of WCLK is less than t
0
WCLK
edge of WCLK and the rising edge of RCLK is less than t
SKEW1
RCLK
WCLK
0
SKEW2
RCLK
- Q
- D
17
is the minimum time between a rising RCLK edge and a rising WCLK edge to guarantee that FF will go HIGH during the current clock cycle. If the time between the rising
17
is the minimum time between a rising WCLK edge and a rising RCLK edge to guarantee that EF will go HIGH during the current clock cycle. If the time between the rising
t
ENS
t
OLZ
t
SKEW1
t
t
ENH
t
CLKH
CLKH
(1)
t
WFF
t
t
A
REF
t
SKEW1
OE
SKEW2
t
CLK
, then FF may not change state until the next WCLK edge.
, then EF may not change state until the next RCLK edge.
t
DATA IN VALID
CLK
Figure 5. Write Cycle Timing
Figure 6. Read Cycle Timing
NO OPERATION
t
SKEW2
t
t
CLKL
t
CLKL
DS
(1)
t
ENS
9
TM
VALID DATA
t
t
ENH
DH
t
t
REF
WFF
t
OHZ
COMMERCIAL AND INDUSTRIAL
NO OPERATION
TEMPERATURE RANGES
MARCH 2013
2766 drw 07
2766 drw 08