LS110GXS-2CF269C Lattice, LS110GXS-2CF269C Datasheet - Page 16

• Manufacturer Part Number: LS110GXS-2CF269C
• Description: LVDS Interface IC 10 Gbps PHY Physical Layer Transceiver, 1.3V
• Manufacturer: Lattice
• Type: LVCMOSr

Specifications of LS110GXS-2CF269C

• Data Rate: 10310 Mbps
• Operating Supply Voltage: 1.3 V, 2.5 V
• Maximum Power Dissipation: 1050 mW
• Maximum Operating Temperature: + 70 C
• Package / Case: BGA-269
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Factory Pack Quantity: 126
• Supply Voltage - Max: 1.37 V, 2.63 V
• Supply Voltage - Min: 1.23 V, 2.37 V

Lattice Semiconductor
Electrical Characteristics
High Speed Input/Output Specifications
AC Characteristics
t
t
f
f
t
∆ f
DC Characteristics
V
V
V
V
V
Performance Characteristics
J
t
LOCK
J
t
Note: Reference clock input characteristics should meet the following requirements for SONET/SDH applications:
R
F
REFCLK
REFCLK
DCREF
ACQ
ACQ
Symbol
GEN
TOL
COM
OD
ID
ICM
ID
REFCLK
-125 dBc/HZ @ 1 MHz offset
-105 dBc/HZ @ 100 KHz offset
TOL
CML output rise time
CML output fall time
Input reference clock frequency
(REF_CK_P/N)
Receiver input reference clock
frequency (RX_REF_CK_P/N, active only in
applications where REF_CK_P/N is used as
a transmitter)
Reference clock duty cycle
Reference clock frequency tolerance
Serial output common mode voltage
(TX_D_P/N)
Serial output differential voltage swing
(TX_D_P/N)
Serial input differential voltage swing
(RX_D_P/N)
Serial input common mode voltage
(RX_D_P/N)
Input voltage differential swing for
(REF_CK_P/N, RX_REF_CK_P/N)
Transmitter jitter generation (peak to peak)
Transmitter CMU PLL acquisition time
Frequency difference at which receiver PLL
goes out of lock
Receiver jitter tolerance
Receiver PLL acquisition time
Parameter
Over Recommended Operating Conditions
See Figure 12.
See Figure 12.
REF_CK_SEL = 1
REF_CK_SEL = 0
REF_CK_SEL = 1
REF_CK_SEL = 0
V
V
TX_CML_ISET[1:0]=11,
See Figure 11.
V
TX_CML_ISET[1:0]=10
V
TX_CML_ISET[1:0]=01
V
TX_CML_ISET[1:0]=00
See Figure 11.
See Figure 11.
See Figure 11.
SC_LOCK_DIFF[1:0] = 11
SC_LOCK_DIFF[1:0] = 10
SC_LOCK_DIFF[1:0] = 01
SC_LOCK_DIFF[1:0] = 00
DDT
DDT
DDT
DDT
DDT
16
= 1.3V, See Figure 11.
= 1.3V,
= 1.3V,
= 1.3V,
= 1.3V,
Test Conditions
XPIO 110GXS Data Sheet
622.08
155.52
622.08
155.52
1100
1000
1250
Min.
-100
0.65
0.75
650
250
40
50
—
—
—
—
—
—
—
—
—
Exceeds SONET Jitter
Tolerance Mask
0.085
1200
1200
Typ.
600
600
35
35
10
10
—
—
—
—
—
—
—
—
—
—
—
—
—
—
644.53
161.13
644.53
161.13
Max.
1750
1500
1100
1800
2000
2400
1.15
100
1.0
45
45
60
—
—
—
—
—
—
—
(pk-pk)
(pk-pk)
(pk-pk)
Units
MHz
MHz
MHz
MHz
ppm
ppm
ppm
ppm
ppm
mV
mV
mV
µS
µS
ps
ps
UI
%
V
V