VP386PAG IDT, VP386PAG Datasheet

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VP386PAG

Manufacturer Part Number
VP386PAG
Description
LVDS Interface IC
Manufacturer
IDT
Datasheet

Specifications of VP386PAG

Product Category
LVDS Interface IC
Rohs
yes
Part # Aliases
IDTVP386PAG
8/28-BIT LVDS RECEIVER FOR VIDEO
General Description
The VP386 is an ideal LVDS receiver that converts 4-pair
LVDS data streams into parallel 28 bits of CMOS/TTL data
with bandwidth up to 2.8 Gbps throughput or 350 Mbytes
per second.
This chip is an ideal means to solve EMI and cable size
problems associated with wide, high-speed TTL interfaces
through very low-swing LVDS signals.
Block Diagram
8/28-BIT LVDS RECEIVER FOR VIDEO
RxCLKIN+
PWRDWN
RxCLKIN-
RxIN0+
RxIN0-
RxIN1+
RxIN1-
RxIN2+
RxIN2-
RxIN3+
RxIN3-
LVDS to TTL
De-serializer
VP386
PLL
1
Features
Wide clock frequency range from 20 MHz to 100 MHz
Pin compatible with the National DS90CF386, THine
THC63LVDF84, TISN65LVDS94
Converts 4-pair LVDS data streams into parallel 28 bits of
CMOS/TTL data
Fully spread spectrum compatible
LVDS voltage swing of 350 mV for low EMI
On-chip PLL requires no external components
Low-power CMOS design
Falling edge clock triggered outputs
Power-down control function
Compatible with TIA/EIA-644 LVDS standards
Packaged in a 56-pin TSSOP (Pb free available)
8
8
8
RED
GREEN
BLUE
HSYNC
VSYNC
RxCLKOUT
DATA ENABLE
CONTROL
ADVANCE INFORMATION
IDTVP386
DATASHEET
IDTVP386
7129/3

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VP386PAG Summary of contents

Page 1

... General Description The VP386 is an ideal LVDS receiver that converts 4-pair LVDS data streams into parallel 28 bits of CMOS/TTL data with bandwidth up to 2.8 Gbps throughput or 350 Mbytes per second. This chip is an ideal means to solve EMI and cable size problems associated with wide, high-speed TTL interfaces through very low-swing LVDS signals ...

Page 2

... RxOUT0 27 30 GND 28 29 56-pin TSSOP VP386 2 COMMERCIAL TEMPERATURE RANGE VCC RxOUT21 RxOUT20 RxOUT19 GND RxOUT18 RxOUT17 RxOUT16 VCC RxOUT15 RxOUT14 RxOUT13 GND RxOUT12 RxOUT11 RxOUT10 VCC RxOUT9 RxOUT8 RxOUT7 GND RxOUT6 RxOUT5 RxOUT4 RxOUT3 VCC RxOUT2 RxOUT1 IDTVP386 7129/3 ...

Page 3

... Ground PLL ground Power-down control input Nomal L: Power down, all ouputs are pulled low. Clock output OUT Data outputs on pins (RxOUT0..27) Ground Digital ground Data outputs on pins (RxOUT0..27) OUT Power Digital power OUT Data outputs on pins (RxOUT0..27) 3 IDTVP386 7129/3 ...

Page 4

... Data outputs on pins (RxOUT0..27) Power Digital power OUT Data outputs on pins (RxOUT0..27) Ground Digital ground OUT Data outputs on pins (RxOUT0..27) Power Digital power OUT Data outputs on pins (RxOUT0..27) Ground Digital ground OUT Data outputs on pins (RxOUT0..27) Power Digital power 4 IDTVP386 7129/3 ...

Page 5

... LVDS RECEIVER FOR VIDEO -0 -0 (VCC+0 (VCC+0 +70 C -65 to +150 C 150 C 260 C 1.61 W (VP386) 12.4 mW/° C above +25°C 15 mW/° C above +25° C Min COMMERCIAL TEMPERATURE RANGE 1 Rating Typ. Max. Units 3.3 3.6 V 2.4 V 100 mVpp IDTVP386 7129/3 ...

Page 6

... RCOH RCOL RSRC RHRC 6 COMMERCIAL TEMPERATURE RANGE Min. Typ. Max. Units 2.0 VCC GND 0.8 2.7 3.3 VCC 0.06 0.3 -0.79 -1.5 ±15 ±10 -60 mA +100 mV -100 mV ±10 ±15 220 mA 240 mA 125 mA 140 mA 140 400 2 3.5 1.8 3 4T/7 3T/7 0.35T-0.3 0.45T-1.6 IDTVP386 7129/3 ...

Page 7

... MHz MHz 15.38 ns Symbol Conditions Still air JA 1 m/s air flow JA 2 m/s air flow COMMERCIAL TEMPERATURE RANGE Min. Typ. Max. Units 14 -0.25 0 0.25 T/7-0.25 T/7 T/7+0.25 2T/7-0.25 2T/7 2T/7+0.25 3T/7-0.25 3T/7 3T/7+0.25 4T/7-0.25 4T/7 4T/7+0.4 5T/7-0.25 5T/7 5T/7+0.25 6T/7-0.25 6T/7 6T/7+0.25 250 500 Min. Typ. Max. Units 84 C/W 76 C/W 67 C/W 50 C/W IDTVP386 7129/3 ...

Page 8

... D0 - D27 Out 8/28-BIT LVDS RECEIVER FOR VIDEO T Figure 1. “Worst Case” Test Pattern Figure 2. 16-Grayscale Test-Pattern Waveforms 80% 20% CLHT RCOP 2.0 V 2.0 V 0.8 V RCOH RCOL RSRC RHRC 2.0 V 2.0 V SETUP HOLD Figure 4. VP386 SETUP/HOLD and High/Low Times 8 COMMERCIAL TEMPERATURE RANGE 80% 20% CHLT 2.0 V IDTVP386 7129/3 ...

Page 9

... PWRDWN VCC RCK CLKOUT 8/28-BIT LVDS RECEIVER FOR VIDEO Vdiff=0V RCOP Figure 5. VP386 Clock In to Clock Out Delay 2.0 V 3.0 V RPLLS Figure 6. VP386 Phase Lock Loop Set Time 1.5 V Figure 7. VP386 Power Down Delay 9 COMMERCIAL TEMPERATURE RANGE 1.5V PWRDWN RCK IN RPDD Low IDTVP386 3.6 V 7129/3 ...

Page 10

... LVDS RECEIVER FOR VIDEO Next Cycle Rspos3 Min Rspos3 Max Rspos4 Min Rspos4 Max Rspos5 Min Rspos5 Max Rspos6 Min Rspos6 Max Figure 8. VP386 LVDS Input Strobe Position Figure 9. Receiver Input Skew Margin 10 COMMERCIAL TEMPERATURE RANGE Skew Margin IDTVP386 7129/3 ...

Page 11

... MAX — 1.20 0.05 0.15 0.80 1.05 0.17 0.27 0.09 0.20 13.90 14.10 8.10 BASIC 6.00 6.20 0.50 BASIC 0.45 0. — 0.10 11 COMMERCIAL TEMPERATURE RANGE Inches COMMON DIMENSIONS MIN MAX — .047 .002 .006 .0032 .041 .007 .011 .0035 .008 .547 .555 .319 BASIC .236 .244 .020 BASIC .018 .030 0 8 — .004 IDTVP386 7129/3 ...

Page 12

... San Jose, CA 95138 © 2007 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT and the IDT logo are trademarks of Integrated Device Technology, Inc. Accelerated Thinking is a service mark of Integrated Device Technology, Inc. All other brands, product names and marks are or may be trademarks or registered trademarks used to identify products or services of their respective owners ...

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