HEF4052BT-Q100 NXP Semiconductors, HEF4052BT-Q100 Datasheet - Page 12

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HEF4052BT-Q100

Manufacturer Part Number
HEF4052BT-Q100
Description
Encoders, Decoders, Multiplexers & Demultiplexers 4-ChanMux/Demux 15V
Manufacturer
NXP Semiconductors
Datasheet

Specifications of HEF4052BT-Q100

Product
Multiplexers / Demultiplexers
Logic Family
HEF
Number Of Lines (input / Output)
4 / 4
Supply Voltage - Max
15 V
Supply Voltage - Min
5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
SO-16
Minimum Operating Temperature
- 40 C
Number Of Input Lines
4
Number Of Output Lines
4
Operating Temperature Range
- 40 C to + 125 C
Operating Voltage
5 V to 15 V
Power Dissipation
500 mW
Part # Aliases
HEF4052BT-Q100,118
NXP Semiconductors
Table 10.
[1]
HEF4052B_Q100
Product data sheet
Input
nYn, nZ
V
Fig 16. Test circuit for measuring switching times
DD
For nYn to nZ propagation delays use V
or V
EE
Test data is given in
Definitions:
DUT = Device Under Test.
R
R
C
T
L
L
Test data
Sn and E
V
= Load capacitance including test jig and probe.
= Load resistance.
= Termination resistance should be equal to output impedance Z
DD
or V
SS
t
 20 ns
r
, t
Table
f
10.
GENERATOR
negative
V
0.5V
positive
M
PULSE
pulse
pulse
EE
DD
. For Sn to nYn or nZ propagation delays use V
All information provided in this document is subject to legal disclaimers.
0 V
0 V
V
V
I
I
Load
C
50 pF
90 %
10 %
V I
L
Rev. 1 — 12 July 2012
t
t
f
r
R T
V
V
V
M
M
90 %
DD
10 %
DUT
R
10 k
L
V
I
t
t
W
W
V O
Dual 4-channel analog multiplexer/demultiplexer
S1 position
t
V
PHL
DD
o
C L
of the pulse generator.
V
V
R L
[1]
or V
M
M
t
t
r
f
EE
S1
V
001aaj903
t
V
DD
PLH
EE
open
DD
HEF4052B-Q100
V
V
.
SS
EE
t
V
PZH
EE
, t
PHZ
© NXP B.V. 2012. All rights reserved.
t
V
PZL
DD
, t
PLZ
other
V
12 of 21
EE

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