74AHC595D-T NXP Semiconductors, 74AHC595D-T Datasheet
74AHC595D-T
Specifications of 74AHC595D-T
Related parts for 74AHC595D-T
74AHC595D-T Summary of contents
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Rev. 5 — 4 July 2012 1. General description The 74AHC595; 74AHCT595 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). They are specified ...
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... NXP Semiconductors 4. Ordering information Table 1. Ordering information Type number Package Temperature range 74AHC595 40 C to +125 C 74AHC595D 40 C to +125 C 74AHC595PW 40 C to +125 C 74AHC595BQ 74AHCT595 40 C to +125 C 74AHCT595D 40 C to +125 C 74AHCT595PW 40 C to +125 C 74AHCT595BQ 5 ...
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... NXP Semiconductors Fig 2. Logic symbol Fig 4. Logic diagram 74AHC_AHCT595 Product data sheet 8-bit serial-in/serial-out or parallel-out shift register with output latches ...
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... NXP Semiconductors 6. Pinning information 6.1 Pinning 74AHC595 74AHCT595 GND 8 Fig 5. Pin configuration SO16 and TSSOP16 6.2 Pin description Table 2. Pin description Symbol Pin GND 8 Q7S SHCP 11 STCP 12 OE ...
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... NXP Semiconductors 7. Functional description [1] Table 3. Function table Control Input SHCP STCP [ HIGH voltage state LOW voltage state; = LOW-to-HIGH transition don’t care; ...
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... NXP Semiconductors 8. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter V supply voltage CC V input voltage I I input clamping current IK I output clamping current OK I output current O I supply current ...
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... NXP Semiconductors 10. Static characteristics Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions 74AHC595 V HIGH-level input voltage LOW-level input voltage HIGH-level output voltage = ...
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... NXP Semiconductors Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions I input leakage GND current 5 OFF-state output current other inputs supply current V ...
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... NXP Semiconductors 11. Dynamic characteristics Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Symbol Parameter Conditions 74AHC595 t propagation SHCP to Q7S; see pd delay STCP to Qn; see ...
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... NXP Semiconductors Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Symbol Parameter Conditions f maximum SHCP or STCP; max frequency see Figure pulse width SHCP HIGH or LOW; W see Figure 3 3 ...
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... NXP Semiconductors Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Symbol Parameter Conditions t enable time OE to Qn; see disable time OE to Qn; see dis maximum SHCP and STCP; max ...
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... NXP Semiconductors 12. Waveforms SH CP input output Measurement points are given in V and V are typical output voltage levels that occur with the output load Fig 8. Shift clock pulse, maximum frequency and input to output propagation delays SH CP input ST CP input Q n output ...
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... NXP Semiconductors SH CP input D S input output Measurement points are given in The shaded areas indicate when the input is permitted to change for predictable output performance. V and V are typical output voltage levels that occur with the output load Fig 10. Data set-up and hold times ...
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... NXP Semiconductors OE input output LOW-to-OFF OFF-to-LOW output HIGH-to-OFF OFF-to-HIGH Measurement points are given in V and V are typical output voltage levels that occur with the output load Fig 12. Enable and disable times Table 8. Measurement points Type 74AHC595 ...
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... NXP Semiconductors negative Test data is given in Table Definitions for test circuit load capacitance including jig and probe capacitance load resistance termination resistance should be equal to the output impedance test selection switch. Fig 13. Load circuitry for switching times Table 9. Test data ...
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... NXP Semiconductors 13. Package outline SO16: plastic small outline package; 16 leads; body width 3 pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions UNIT max. 0.25 1.45 mm 1.75 0.25 0.10 1.25 0.010 0.057 inches 0.069 0.01 0.004 0.049 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...
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... NXP Semiconductors TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...
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... NXP Semiconductors DHVQFN16: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 16 terminals; body 2.5 x 3.5 x 0.85 mm terminal 1 index area terminal 1 index area DIMENSIONS (mm are the original dimensions) (1) A UNIT max. 0.05 0. 0.2 0.00 0.18 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. ...
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... NXP Semiconductors 14. Abbreviations Table 10. Abbreviations Acronym Description CDM Charged Device Model CMOS Complementary Metal-Oxide Semiconductor ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic 15. Revision history Table 11. Revision history Document ID Release date 74AHC_AHCT595 v.5 20120704 • Modifications: Added GND in the pin configuration drawing DHVQFN16 (errata) 74AHC_AHCT595 v ...
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... Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...
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... NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ ...
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... NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 7 Functional description . . . . . . . . . . . . . . . . . . . 5 8 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 9 12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 13 Package outline ...