74LVC162373ADL-T NXP Semiconductors, 74LVC162373ADL-T Datasheet
74LVC162373ADL-T
Specifications of 74LVC162373ADL-T
Related parts for 74LVC162373ADL-T
74LVC162373ADL-T Summary of contents
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D-type transparent latch; 30 series termination resistors tolerant inputs/outputs; 3-state Rev. 3 — 18 January 2013 1. General description The 74LVC162373A and 74LVCH162373A are 16-bit D-type transparent latches with separate D-type inputs with bus ...
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... NXP Semiconductors ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-B exceeds 200 V CDM JESD22-C101E exceeds 1000 V Specified from 40 C to +85 C and 40 C to +125 C 3. Ordering information Table 1. Ordering information Type number Package Temperature range ...
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... NXP Semiconductors 1D0 1LE 1OE Fig 3. Logic diagram Fig 4. Bus hold circuit 74LVC_LVCH162373A Product data sheet 74LVC162373A; 74LVCH162373A 16-bit D-type transparent latch; 30 resistors tolerance; 3-state D Q 1Q0 2D0 LATCH 2LE 2OE to 7 other channels V CC input to internal circuit mna428 All information provided in this document is subject to legal disclaimers ...
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... NXP Semiconductors 5. Pinning information 5.1 Pinning Fig 5. Pin configuration (T)SSOP48 5.2 Pin description Table 2. Pin description Symbol Pin 1OE 1 2OE 24 GND 4, 10, 15, 21, 28, 34, 39 18, 31 1LE 48 2LE 25 1D[0:7] 47, 46, 44, 43, 41, 40, 38, 37 2D[0:7] 36, 35, 33, 32, 30, 29, 27, 26 1Q[0: 11, 12 2Q[0:7] 13, 14, 16, 17, 19, 20, 22, 23 ...
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... NXP Semiconductors 6. Functional description Table 3. Functional table (per section of 8 bits) Operating modes Enable and read register (transparent mode) Latch and read register Latch register and disable outputs H [ HIGH voltage level h = HIGH voltage level one set-up time prior to the HIGH-to-LOW LE transition ...
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... NXP Semiconductors 8. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter V supply voltage CC V input voltage I V output voltage O T ambient temperature amb t/V input transition rise and fall rate 9. Static characteristics Table 6. Static characteristics At recommended operating conditions. Voltages are referenced to GND (ground = 0 V). ...
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... NXP Semiconductors Table 6. Static characteristics At recommended operating conditions. Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions I OFF-state output current GND O I power-off V OFF CC leakage current I supply current I additional supply per input pin; CC current ...
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... NXP Semiconductors 10. Dynamic characteristics Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V). For test circuit see Symbol Parameter Conditions t propagation delay nDn to nQn; see pd nLE to nQn; see t enable time nOE to nQn; see en t disable time nOE to nQn; see dis t pulse width nLE HIGH ...
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... NXP Semiconductors Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V). For test circuit see Symbol Parameter Conditions t hold time nDn to nLE; see h t output skew time V sk( power dissipation per input capacitance [1] Typical values are measured the same as t and t ...
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... NXP Semiconductors 11. AC waveforms Measurement points are given in V and V are typical output voltage levels that occur with the output load Fig 6. Input (nDn) to output (nQn) propagation delays Measurement points are given in V and V are typical output voltage levels that occur with the output load. ...
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... NXP Semiconductors nOE input nQn output LOW-to-OFF OFF-to-LOW nQn output HIGH-to-OFF OFF-to-HIGH Measurement points are given in V and V are typical output voltage levels that occur with the output load Fig 8. 3-state enable and disable times nDn input ...
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... NXP Semiconductors Test data is given in Table Definitions for test circuit Load resistance Load capacitance including jig and probe capacitance Termination resistance should be equal to output impedance External voltage for measuring switching times. EXT Fig 10. Test circuit for measuring switching times Table 9 ...
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... NXP Semiconductors 12. Package outline SSOP48: plastic shrink small outline package; 48 leads; body width 7 pin 1 index 1 e DIMENSIONS (mm are the original dimensions) A UNIT max. 0.4 2.35 mm 2.8 0.25 0.2 2.20 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION ...
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... NXP Semiconductors TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6 pin 1 index 1 DIMENSIONS (mm are the original dimensions). A UNIT max. 0.15 1.05 mm 1.2 0.25 0.05 0.85 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...
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... Document ID Release date 74LVC_LVCH162373A v.3 20130118 • Modifications: The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. • Table 74LVC_LVCH162373A v.2 20040205 74LVC_LVCH162373A v.1 19980805 ...
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... Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...
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... D-type transparent latch; 30 resistors tolerance; 3-state NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ ...
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... NXP Semiconductors 17. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 6 Functional description . . . . . . . . . . . . . . . . . . . 5 7 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . waveforms . . . . . . . . . . . . . . . . . . . . . . . . . 10 12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 13 13 Abbreviations ...