74HC04D-Q100,118 NXP Semiconductors, 74HC04D-Q100,118 Datasheet

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74HC04D-Q100,118

Manufacturer Part Number
74HC04D-Q100,118
Description
Inverters
Manufacturer
NXP Semiconductors
Datasheet

Specifications of 74HC04D-Q100,118

Rohs
yes
Logic Family
74HC
Logic Type
Hex Schmitt Inverter
Propagation Delay Time
130 ns
Supply Voltage - Max
6 V
Supply Voltage - Min
2 V
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 125 C
Package / Case
SO-14
Input Level
CMOS
Mounting Style
SMD/SMT
Operating Supply Voltage
2 V to 6 V
Output Level
CMOS
1. General description
2. Features and benefits
The 74HC04-Q100; 74HCT04-Q100 is a hex inverter. Inputs also include clamp diodes,
this enables the use of current limiting resistors to interface inputs to voltages in excess of
V
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
CC
74HC04-Q100; 74HCT04-Q100
Hex inverter
Rev. 2 — 10 April 2013
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Complies with JEDEC standard JESD7A
Complies with JEDEC standard JESD8-1A
Input levels:
ESD protection:
Multiple package options
.
Specified from 40 C to +85 C and from 40 C to +125 C
For 74HC04-Q100: CMOS level
For 74HCT04-Q100: TTL level
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )
Product data sheet

Related parts for 74HC04D-Q100,118

74HC04D-Q100,118 Summary of contents

Page 1

Hex inverter Rev. 2 — 10 April 2013 1. General description The 74HC04-Q100; 74HCT04-Q100 is a hex inverter. Inputs also include clamp diodes, this enables the use of current limiting resistors to interface inputs to voltages in excess ...

Page 2

... NXP Semiconductors 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name 40 C to +125 C 74HC04D-Q100 74HCT04D-Q100 40 C to +125 C 74HC04DB-Q100 74HCT04DB-Q100 40 C to +125 C 74HC04PW-Q100 74HCT04PW-Q100 40 C to +125 C 74HC04BQ-Q100 74HCT04BQ-Q100 4. Functional diagram ...

Page 3

... NXP Semiconductors 5. Pinning information +&4 +&74  $ < < < *1'  Fig 4. Pin configuration DIP14, SO14 and (T)SSOP14 5.1 Pin description Table 2. Pin description Symbol Pin GND 74HC_HCT04_Q100 Product data sheet 74HC04-Q100 ...

Page 4

... NXP Semiconductors 6. Functional description Table 3. Function table H = HIGH voltage level LOW voltage level Input Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter V supply voltage CC I input clamping current ...

Page 5

... NXP Semiconductors 9. Static characteristics Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions 74HC04-Q100 V HIGH-level input voltage LOW-level input voltage HIGH-level output voltage =  ...

Page 6

... NXP Semiconductors Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions I supply current 5 I additional per input pin; CC supply current other inputs 4 5 input I capacitance 10. Dynamic characteristics Table 7. ...

Page 7

... NXP Semiconductors N = number of inputs switching;  (C  V  sum of outputs 11. Waveforms Measurement points are given in V and V are typical voltage output levels that occur with the output load Fig 6. The input (nA) to output (nY) propagation delay times Table 8. ...

Page 8

... NXP Semiconductors Test data is given in Table Definitions test circuit termination resistance should be equal to output impedance load capacitance including jig and probe capacitance. L Fig 7. Load circuitry for measuring switching times Table 9. Test data Type Input V I 74HC04-Q100 V CC 74HCT04-Q100 3.0 V 74HC_HCT04_Q100 Product data sheet 74HC04-Q100 ...

Page 9

... NXP Semiconductors 12. Package outline SO14: plastic small outline package; 14 leads; body width 3 pin 1 index 1 e DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 1.45 mm 1.75 0.25 0.10 1.25 0.010 0.057 inches 0.069 0.01 0.004 0.049 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...

Page 10

... NXP Semiconductors SSOP14: plastic shrink small outline package; 14 leads; body width 5 pin 1 index 1 e DIMENSIONS (mm are the original dimensions) A UNIT max. 0.21 1. 0.25 0.05 1.65 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION IEC SOT337-1 Fig 9 ...

Page 11

... NXP Semiconductors TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4 pin 1 index 1 e DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...

Page 12

... NXP Semiconductors DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; body 2 0.85 mm terminal 1 index area terminal 1 index area DIMENSIONS (mm are the original dimensions) (1) A UNIT max. 0.05 0. 0.2 0.00 0.18 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. ...

Page 13

... Revision history Table 11. Revision history Document ID Release date 74HC_HCT04_Q100 v.2 20130410 • Modifications: 74HC04DB-Q100 and 74HCT04DB-Q100 added. 74HC_HCT04_Q100 v.1 20120712 74HC_HCT04_Q100 Product data sheet 74HC04-Q100; 74HCT04-Q100 Data sheet status Product data sheet Product data sheet All information provided in this document is subject to legal disclaimers. ...

Page 14

... Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...

Page 15

... NXP Semiconductors No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations ...

Page 16

... NXP Semiconductors 17. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 5.1 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 Functional description . . . . . . . . . . . . . . . . . . . 4 7 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 6 11 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9 13 Abbreviations ...

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