74FCT244CTPYG8 IDT, 74FCT244CTPYG8 Datasheet - Page 5
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74FCT244CTPYG8
Manufacturer Part Number
74FCT244CTPYG8
Description
Buffers & Line Drivers Octal Buffer/Line Driver
Manufacturer
IDT
Datasheet
1.74FCT244CTSOG.pdf
(6 pages)
Specifications of 74FCT244CTPYG8
Rohs
yes
Part # Aliases
IDT74FCT244CTPYG8
TEST CIRCUITS AND WAVEFORMS
IDT54/74FCT244T/AT/CT
FAST CMOS OCTAL BUFFER/LINE DRIVER
ASYNCHRONOUS CONTROL
SYNCHRONOUS CONTROL
Generator
CLOCK ENABLE
INPUT TRANSITION
INPUT TRANSITION
Pulse
OPPOSITE PHASE
SAME PHASE
PRESET
PRESET
TIMING
CLEAR
CLEAR
INPUT
INPUT
DATA
OUTPUT
V
ETC.
ETC.
Set-Up, Hold, and Release Times
IN
Test Circuits for All Outputs
R
Propagation Delay
T
D.U.T
.
V
t
PLH
t
CC
PLH
t
t
SU
SU
V
OUT
t
REM
t
H
t
t
C
PHL
PHL
50pF
L
t
H
Octal Link
500W
500W
Octal Link
Octal Link
3V
1.5V
0V
V
1.5V
V
3V
1.5V
0V
7.0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
OH
OL
5
SWITCH POSITION
DEFINITIONS:
C
R
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; t
NORMALLY
NORMALLY
L
T
CONTROL
= Load capacitance: includes jig and probe capacitance.
= Termination resistance: should be equal to Z
HIGH-LOW-HIGH
LOW-HIGH-LOW
OUTPUT
OUTPUT
INPUT
HIGH
LOW
All Other Tests
Disable Low
Enable Low
Open Drain
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
PULSE
PULSE
Test
SWITCH
CLOSED
SWITCH
OPEN
ENABLE
t
t
PZH
PZL
Enable and Disable Times
Pulse Width
1.5V
1.5V
3.5V
0V
t
PHZ
t
W
DISABLE
OUT
t
F
PLZ
≤ 2.5ns; t
of the Pulse Generator.
Switch
Closed
0.3V
0.3V
Open
Octal Link
R
Octal Link
≤ 2.5ns.
3V
1.5V
0V
3.5V
V
V
0V
OL
OH
1.5V
1.5V