TDA8035HN/C1,157 NXP Semiconductors, TDA8035HN/C1,157 Datasheet - Page 11

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TDA8035HN/C1,157

Manufacturer Part Number
TDA8035HN/C1,157
Description
Interface - Specialized SMART CARD INTERFACE
Manufacturer
NXP Semiconductors
Datasheet

Specifications of TDA8035HN/C1,157

Rohs
yes
Factory Pack Quantity
2450
NXP Semiconductors
TDA8035HN
Product data sheet
COMPANY PUBLIC
8.4 I/O circuitry
The three data lines I/O, AUX1 and AUX2 are identical.
To enter the idle state, both lines (I/O and I/OUC) are pulled HIGH via a 10 k resistor (I/O
to V
I/O is referenced to V
V
The first side on which a falling edge occurs becomes the master. An anti-latch circuit
disables the detection of falling edges on the other line, which becomes the slave.
After a time delay t
side.
When the master side returns to logic 1, the slave side transmits the logic 1 during the
time delay t
The active pull-up feature ensures fast Low to High transitions. It is able to deliver more
than 1 mA to an output voltage of 0.9 V
pull-up pulse, the output voltage depends on the internal pull-up resistor and on the load
current.
The current to and from the cards I/O lines is internally limited to 15 mA.
The maximum frequency on these lines is 1.5 MHz.
CC
CC
 V
and I/OUC to V
DD(INTF)
pu
and both sides return to their idle states.
.
All information provided in this document is subject to legal disclaimers.
d(edge)
Rev. 2.1 — 3 December 2012
CC
DD(INTF)
, and I/OUC to V
, the logic 0 present on the master side is transmitted to the slave
).
CC
DD(INTF)
on an 80 pF load. At the end of the active
which allows operation with
TDA8035HN
Smart card interface
© NXP B.V. 2012. All rights reserved.
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