SCC2681AE1A44-T NXP Semiconductors, SCC2681AE1A44-T Datasheet
SCC2681AE1A44-T
Specifications of SCC2681AE1A44-T
Related parts for SCC2681AE1A44-T
SCC2681AE1A44-T Summary of contents
Page 1
SCC2681 Dual asynchronous receiver/transmitter (DUART) Product data INTEGRATED CIRCUITS 2004 Apr 06 ...
Page 2
... SCC2681AC1N40 DIP40 plastic dual in-line package; 40 leads (600 mil) Industrial 10 – + amb SCC2681AE1A44 PLCC44 plastic leaded chip carrier; 44 leads SCC2681AE1N28 DIP28 plastic dual in-line package; 28 leads (600 mil) SCC2681AE1N40 DIP40 plastic dual in-line package; 40 leads (600 mil) ...
Page 3
Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) PIN CONFIGURATIONS IP3 2 39 IP4 IP5 IP1 4 37 IP6 IP2 CEN IP0 7 34 RESET WRN 8 33 ...
Page 4
Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) PIN SYMBOL SYMBOL PLCC44 DIP40 DIP28 RxDA RxDB TxDA TxDB OP0 OP1 ...
Page 5
Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) 1 ABSOLUTE MAXIMUM RATINGS SYMBOL T Operating ambient temperature range amb T Storage temperature range stg All voltages with respect to ground Pin voltage range NOTES: 1. Stresses above those listed under Absolute Maximum ...
Page 6
Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) AC CHARACTERISTICS – + +5.0 V 10% amb CC SYMBOL SYMBOL Reset Timing (Figure 3) t RESET pulse width RES 6 Bus Timing (Figure 4) ...
Page 7
Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) 8. Consecutive write operations to the same command register require at least three edges of the X1 clock between writes. 9. This parameter is not applicable to the 28-pin device. 10. Operation to 0 ...
Page 8
Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) BLOCK DIAGRAM The SCC2681 DUART consists of the following eight major sections: data bus buffer, operation control, interrupt control, timing, communications Channels A and B, input port and output port. Refer to the block ...
Page 9
Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) Output Port The output port pins may be controlled by the OPR, OPCR, MR and CR registers. Via appropriate programming they may be just another parallel port to external circuits, or they may represent ...
Page 10
Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) shift register is lost and the overrun error status bit (SR[4] will be set-upon receipt of the start bit of the new (overrunning) character). The receiver can control the deactivation of RTS. If programmed ...
Page 11
Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) PROGRAMMING The operation of the DUART is programmed by writing control words into the appropriate registers. Operational feedback is provided via status registers which can be read by the CPU. The addressing of the ...
Page 12
Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) Table 2. Register Bit Formats BIT 7 BIT 6 RxRTS RxINT CONTROL SELECT MR1A MR1A RxRDY MR1B 1 = Yes 1 = FFULL NOTE block error mode, ...
Page 13
Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) Table 2. Register Bit Formats (Continued) BIT 7 BIT 6 BRG SET ACR SELECT MODE AND SOURCE 0 = set set 2 BIT 7 BIT 6 DELTA DELTA IPCR IP 3 ...
Page 14
Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) MR1A – Channel A Mode Register 1 MR1A is accessed when the Channel A MR pointer points to MR1. The pointer is set to MR1 by RESET ‘set pointer’ command applied ...
Page 15
Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) or transmitted character. Likewise mode is deselected the device will switch out of the mode immediately. An exception to this is switching out of autoecho or remote loopback modes: if the deselection ...
Page 16
Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) CSRA[7:4] – Channel A Receiver Clock Select This field selects the baud rate clock for the Channel A receiver as follows (X1 rate at 3.6864 MHz): CSRA[7:4] ACR[ 0000 50 0001 110 ...
Page 17
Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) CRB – Channel B Command Register CRB is a register used to supply commands to Channel B. Multiple commands can be specified in a single write to CRB as long as the commands are ...
Page 18
Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) OPCR – Output Port Configuration Register OPCR[7] – OP7 Output Select This bit programs the OP7 output to provide one of the following: 0 – The complement of OPR[7]. 1 – The Channel B ...
Page 19
Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) ISR – Interrupt Status Register This register provides the status of all potential interrupt sources. The contents of this register are masked by the Interrupt Mask Register (IMR bit in the ISR ...
Page 20
Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) masked off through the OPCR[3: until the T/C is programmed to the desired operational state. In the counter mode, the C/T counts down the number of pulses loaded into CTUR and CTLR ...
Page 21
Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) Table 5. Baud Rates Extended CSR[7:4] ACR[ 0000 50 0001 110 0010 134.5 0011 200 0100 300 0101 600 0110 1,200 0111 1,050 1000 2,400 1001 4,800 1010 7,200 1011 9,600 1100 ...
Page 22
Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) TIMING DIAGRAMS RESET A0– CEN t CS RDN D0–D7 FLOAT (READ) WDN D0–D7 (WRITE) RDN IP0–IP6 WRN OP0–OP7 2004 Apr 06 t RES Figure 3. Reset Timing ...
Page 23
Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) TIMING DIAGRAMS (Continued) NOTES: 1. INTRN or OP3 – OP7 when used as interrupt outputs. 2. The test for open-drain outputs is intended to guarantee switching of the output transistor. Measurement of this response ...
Page 24
Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) TxC (INPUT) TxD TxC (1X OUTPUT) TIMING DIAGRAMS (Continued) RxC (1X INPUT) RxD TxD D1 TRANSMITTER ENABLED TxRDY (SR2) WRN CTSN (IP0) 2 RTSN (OP0) OPR( NOTES: 1. Timing ...
Page 25
Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) TIMING DIAGRAMS (Continued) D1 RxD RECEIVER ENABLED RxRDY (SR0) FFULL (SR1) RxRDY/ FFULL 2 (OP5) RDN STATUS DATA D1 OVERRUN (SR4) 1 RTS (OP0) OPR( NOTES: 1. Timing shown for MR1(7) = ...
Page 26
Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) DIP28: plastic dual in-line package; 28 leads (600 mil) 2004 Apr 06 26 Product data SCC2681 SOT117-1 ...
Page 27
Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) DIP40: plastic dual in-line package; 40 leads (600 mil) 2004 Apr 06 27 Product data SCC2681 SOT129-1 ...
Page 28
Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) PLCC44: plastic leaded chip carrier; 44 leads 2004 Apr 06 28 Product data SCC2681 SOT187-2 ...
Page 29
Philips Semiconductors Dual asynchronous receiver/transmitter (DUART) REVISION HISTORY Rev Date Description _1 20040406 Product data (9397 750 12075). ECN 853-2445 01-A15014 of 15 December 2003. Data sheet status Product [1] Level Data sheet status [2] [3] status I Objective data ...