MAX3881ECB-D Maxim Integrated, MAX3881ECB-D Datasheet - Page 5

• Manufacturer Part Number: MAX3881ECB-D
• Description: Serializers & Deserializers - Serdes
• Manufacturer: Maxim Integrated
• Type: Deserializerr

Specifications of MAX3881ECB-D

• Data Rate: 2.488 Gbit/s
• Input Type: TTL
• Output Type: PECL
• Number Of Inputs: 1
• Number Of Outputs: 16
• Operating Supply Voltage: 3 V to 3.6 V
• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: TQFP-64 EP
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 3 V

1, 15, 16, 17,
53, 55, 59, 61
4, 7, 10, 13,
25, 33, 41,
49, 57, 62,
32, 34, 36,
38, 40, 42,
20, 22, 24,
26, 28, 30,
44, 46, 48,
50, 52, 54,
21, 23, 27,
29, 31, 35,
37, 39, 43,
45, 47, 51,
56, 58, 60
PIN
EP
64
11
12
14
18
19
63
2
3
5
6
8
9
PD0 to PD15
Exposed Pad
PHADJ+
PHADJ-
PCLK+
NAME
SLBI+
PCLK-
_______________________________________________________________________________________
SLBI-
GND
SDI+
FIL+
SDI-
V
LOL
FIL-
SIS
CC
1:16 Deserializer with Clock Recovery
Ground
Positive Filter Input. PLL loop filter connection. Connect a 1.0µF capacitor between FIL+ and FIL-.
Negative Filter Input. PLL loop filter connection. Connect a 1.0µF capacitor between FIL+ and FIL-.
+3.3V Supply Voltage
Positive Phase-Adjust Input. Used to optimally align internal PLL phase. Connect to V
used.
Negative Phase-Adjust Input. Used to optimally align internal PLL phase. Connect to V
used.
Positive Serial Data Input. 2.488Gbps data stream.
Negative Serial Data Input. 2.488Gbps data stream.
Positive System Loopback Input. 2.488Gbps data stream.
Negative System Loopback Input. 2.488Gbps data stream.
Signal Input Selection. TTL low for normal data input (SDI). TTL high for system loopback input
(SLBI).
Positive Parallel Clock PECL Output
Negative Parallel Clock PECL Output
Parallel Data Single-Ended PECL Outputs. Data is updated on the negative transition of the PCLK
signal (Figure 2).
Loss-of-Lock Output. PLL loss-of-lock monitor, TTL active low (internal 10kΩ pullup resistor).
The LOL monitor is valid only when a data stream is present on the inputs to the MAX3881.
Ground. This must be soldered to a circuit board for proper electrical and thermal performance
(see Package Information).
+3.3V, 2.488Gbps, SDH/SONET
FUNCTION
Pin Description
CC
CC
if not
if not
5