92HD90B0X5NLGXYAX8 IDT, 92HD90B0X5NLGXYAX8 Datasheet - Page 26
![no-image](/images/no-image-200.jpg)
92HD90B0X5NLGXYAX8
Manufacturer Part Number
92HD90B0X5NLGXYAX8
Description
Interface - CODECs
Manufacturer
IDT
Datasheet
1.92HD90B0X5NLGXYAX8.pdf
(303 pages)
Specifications of 92HD90B0X5NLGXYAX8
Rohs
yes
Part # Aliases
IDT92HD90B0X5NLGXYAX8
- Current page: 26 of 303
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92HD98
SINGLE CHIP PC AUDIO SYSTEM, CODEC+MONO SPEAKER AMPLIFIER+CAPLESS HP+LDO
IDT CONFIDENTIAL
©2009 INTEGRATED DEVICE TECHNOLOGY, INC.
2.15. Digital Microphone Support
Headphone
SD/Mute
Internal
Amp
CODEC
The digital microphone interface permits connection of a digital microphone(s) to the CODEC via the
DMIC0, DMIC1, and DMIC_CLK 3-pin interface. The DMIC0 and DMIC1 signals are inputs that carry
individual channels of digital microphone data to the ADC. In the event that a single microphone is
used, the data is ported to both ADC channels. This mode is selected using a vendor specific verb
and the left time slot is copied to the ADC left and right inputs.
The DMIC_CLK output is controllable from 4.704Mhz, 3.528Mhz, 2.352Mhz, 1.176Mhz and is syn-
chronous to the internal master clock. The default frequency is 2.352Mhz.
The two DMIC data inputs are reported as two stereo input pin widgets that incorporate a boost
amplifier. The pin widgets are shown connected to the ADCs through the same multiplexors as the
Figure 3. HP EAPD Example to be replaced by single pin for internal amp
Internal BTL
EAPD PIN
SD/Mute
Control
Amp
(MUTE LED ON
SAME BOARD)
UP/DOWN
BUTTONS
MUTE +
EAPD
HP AUDIO CONTROL BLOCK DIAGRAM
SCAN
CODES
SYNC FROM KBC TO OS
Figure 4. EAPD implementation
SMU MUTE
KBC
VDD
26
SYNC FROM AUDIO GUI TO KBC
A_EAPD
A_SD
SPKR_EN#
GPIO_1
SPKR AMP
OTHER
CODEC
OS
SD#
Power Amp
External
V 1.2 3/12
92HD98
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