S34ML02G100TFA000 Spansion, S34ML02G100TFA000 Datasheet - Page 61
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S34ML02G100TFA000
Manufacturer Part Number
S34ML02G100TFA000
Description
Flash 2G, 3V, 25ns NAND Flash
Manufacturer
Spansion
Datasheet
1.S34ML04G100BHI000.pdf
(76 pages)
Specifications of S34ML02G100TFA000
Rohs
yes
Data Bus Width
1 bit
Memory Type
NAND Flash
Memory Size
2 Gbit
Architecture
Sectored
Timing Type
Asynchronous
Access Time
25 ns
Supply Voltage - Max
3.6 V
Supply Voltage - Min
2.7 V
Maximum Operating Current
40 mA
Operating Temperature
- 40 C to + 85 C
Mounting Style
SMD/SMT
Package / Case
TSOP-48
Organization
2048 B x 8, 2048 B x 16
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
6.26
6.27
March 7, 2013 S34ML01G1_04G1_15
Read ID Operation Timing
Read ID2 Operation Timing
Notes:
1. 4-cycle address is shown for the S34ML01G1. For S34ML02G1 and S34ML04G1, insert an additional address cycle of 00h.
2. If Status Register polling is used to determine completion of the Read ID2 operation, the Read Command (00h) must be issued before
WE#
CLE
CE#
RE#
ALE
I/Ox
WE#
R/B#
CLE
CE#
RE#
ALE
ID2 data can be read from the flash.
I/Ox
I/Ox
I/Ox
2 Gb Device
4 Gb Device
1 Gb Device
Commands
Read ID2
30h 65h 00h 00h 02h 02h 00h 30h
Command
Read ID
90h
90h
09h
D a t a
Spansion
4 Cycle Address
(Note 1)
Address 1
Figure 6.35 Read ID2 Operation Timing
Figure 6.34 Read ID Operation Timing
S h e e t
Cycle
®
00h
00h
00h
SLC NAND Flash Memory for Embedded
Command
tWHR
Read ID2
Confirm
tAR
Busy
tR
tREA
1st Cycle
ID2 Data
Maker
Code
01h
01h
01h
2nd Cycle
ID2 Data
Device
F1h
DAh
DCh
Code
ID2 Data
3rd Cycle
3rd Cycle
90h
00h
90h
4th Cycle
ID2 Data
4th Cycle
1Dh
95h
95h
5th Cycle
5th Cycle
ID2 Data
54h
44h
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