S34ML02G100TFA000 Spansion, S34ML02G100TFA000 Datasheet - Page 23
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S34ML02G100TFA000
Manufacturer Part Number
S34ML02G100TFA000
Description
Flash 2G, 3V, 25ns NAND Flash
Manufacturer
Spansion
Datasheet
1.S34ML04G100BHI000.pdf
(76 pages)
Specifications of S34ML02G100TFA000
Rohs
yes
Data Bus Width
1 bit
Memory Type
NAND Flash
Memory Size
2 Gbit
Architecture
Sectored
Timing Type
Asynchronous
Access Time
25 ns
Supply Voltage - Max
3.6 V
Supply Voltage - Min
2.7 V
Maximum Operating Current
40 mA
Operating Temperature
- 40 C to + 85 C
Mounting Style
SMD/SMT
Package / Case
TSOP-48
Organization
2048 B x 8, 2048 B x 16
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
3.4
March 7, 2013 S34ML01G1_04G1_15
Page Reprogram — S34ML02G1 and S34ML04G1
Page Program may result in a fail, which can be detected by Read Status Register. In this event, the host
may call Page Reprogram. This command allows the reprogramming of the same pattern of the last (failed)
page into another memory location. The command sequence initiates with reprogram setup (8Bh), followed
by the five cycle address inputs of the target page. If the target pattern for the destination page is not changed
compared to the last page, the program confirm can be issued (10h) without any data input cycle, as
described in
On the other hand, if the pattern bound for the target page is different from that of the previous page, data in
cycles can be issued before program confirm ‘10h’, as described in
Cycle Type
Cycle Type
Cycle Type
Cycle Type
As defined for Page
SR[6]
SR[6]
SR[6]
SR[6]
As defined for Page
I/Ox
IOx
I/Ox
I/Ox
Program
Program
A
Figure
A
CMD
CMD
8Bh
80h
CMD
CMD
00h
70h
ADDR
ADDR
3.1.
FAIL !
C1
C1
ADDR
Dout
C1
E1
D a t a
ADDR
ADDR
C2
C2
Spansion
ADDR
Figure 3.2 Page Reprogram with Data Manipulation
C2
Page M
Page N
ADDR
ADDR
R1
R1
Page N
ADDR
R1
S h e e t
ADDR
®
ADDR
R2
R2
SLC NAND Flash Memory for Embedded
ADDR
Figure 3.1 Page Reprogram
R2
tADL
tADL
CMD
8Bh
tASL
ADDR
Din
Din
D0
D0
C1
Din
D0
ADDR
Din
Din
D1
D1
C2
Page M
Din
D1
ADDR
Din
Din
. . .
. . .
R1
Figure
Din
. . .
ADDR
Din
Din
Dn
Dn
R2
3.2.
Din
Dn
CMD
CMD
10h
10h
tWB
tWB
CMD
CMD
10h
10h
tWB
tPROG
tWB
tPROG
tPROG
tPROG
CMD
70h
FAIL !
Dout
E1
A
A
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