IS25LD040-JBLE-TR ISSI, IS25LD040-JBLE-TR Datasheet
IS25LD040-JBLE-TR
Specifications of IS25LD040-JBLE-TR
Related parts for IS25LD040-JBLE-TR
IS25LD040-JBLE-TR Summary of contents
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... Volt to 3.60 Volt, to perform read, erase and program operations. The devices can be programmed in standard EPROM programmers. The IS25LD040 are accessed through a 4-wire SPI Interface consisting of Serial Data Input/Output (SlO), Serial Data Output (SO), Serial Clock (SCK), and Chip Enable (CE#) pins. They comply with all recognized command codes and operations ...
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... HOLD# INPUT Hold: Pause serial communication by the master device without resetting the serial sequence. Integrated Silicon Solution, Inc.- www.issi.com Rev. B 2/12/2013 Vcc CE HOLD# 3 WP# SCK 4 GND SIO 8-Pin WSON IS25LD040 8 Vcc 7 HOLD# 6 SCK SIO 5 2 ...
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... BLOCK DIAGRAM Integrated Silicon Solution, Inc.- www.issi.com Rev. B 2/12/2013 IS25LD040 3 ...
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... SPI MODES DESCRIPTION Multiple IS25LD040 devices can be connected on the SPI serial bus and controlled by a SPI Master, i.e. microcontroller, as shown in Figure 1. The devices support either of two SPI modes: Mode 0 (0, 0) Mode 3 (1, 1) The difference between these two modes is the clock polarity when the SPI master is in Stand-by mode: the serial clock remains at “ ...
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... Figure 2. SPI Modes Supported SCK Mode 0 (0, 0) SCK Mode 3 (1, 1) SIO MSb Input mode SO Integrated Silicon Solution, Inc.- www.issi.com Rev. B 2/12/2013 IS25LD040 MSb 5 ...
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... SYSTEM CONFIGURATION The IS25LD040 devices are designed to interface directly with the synchronous Serial Peripheral Interface (SPI) of the Motorola MC68HCxx series of microcontrollers or any SPI interface-equipped system controllers. The devices have two superset features that can be enabled through specific software instructions and the ...
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... WRSR instruction will be ignored. If the SRWD is set to “1” and WP# is pulled high (V Register can be changed by a WRSR instruction. Bit 6 Bit 5 Bit 4 Bit 3 Reserved BP2 BP1 IS25LD040 ), the volatile bits of Status IL ), the Status IH Bit 2 Bit 1 Bit 0 BP0 WEL WIP 0 0 ...
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... Reserved: Always "0"s Status Register Write Disable: (See Table 9 for details) Bit 7 SRWD "0" indicates the Status Register is not write-protected (default) "1" indicates the Status Register is write-protected Table 8. Block Write Protect Bits for IS25LD040 Status Register Bits BP2 BP1 0 0 ...
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... REGISTERS (CONTINUED) PROTECTION MODE The IS25LD040 have two types of write-protection mechanisms: hardware and software. These are used to prevent irrelevant operation in a possibly noisy environment and protect the data integrity. HARDWARE WRITE-PROTECTION The devices provide two hardware write-protection features: a. When inputting a program, erase or write status ...
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... Chip Erase 60h HOLD OPERATION HOLD# is used in conjunction with CE# to select the IS25LD040. When the devices are selected and a serial sequence is underway, HOLD# can be used to pause the serial communication with the master device without resetting the serial sequence. Integrated Silicon Solution, Inc.- www.issi.com Rev ...
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... ID is shifted out, the manufacturer ID and device ID will be looping until the pulled high of CE# signal. Table 11. Product Identification Product Identification Manufacturer ID Device ID: IS25LD040 Manuf acture ID1 IS25LD040 Data First Byte 9Dh Second Byte 7Fh Dev ice ID Manuf acture ID2 11 ...
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... SCK. If CE# stays low after the last bit of the Device ID is shifted out, the Manufacturer ID and Device ID will loop until CE# is pulled high Manufacture ID2 Manufacture ID1 IS25LD040 Device ID 12 ...
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... If CE# stays low after the last bit of the Device ID is shifted out, the Manufacturer ID and Device ID will loop until CE# is pulled high Device ID1 IS25LD040 ... 3 - BYTE ADDRESS ... ...
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... ADDRESS will output the 1st manufacture ID (9Dh) first -> device ID1 -> 2nd manufacture ID (7Fh) ADDRESS will output the device ID1 -> 1st manufacture ID (9D) -> 2nd manufacture ID (7Fh) Integrated Silicon Solution, Inc.- www.issi.com Rev. B 2/12/2013 IS25LD040 14 ...
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... WRITE ENABLE OPERATION The Write Enable (WREN) instruction is used to set the Write Enable Latch (WEL) bit. The WEL bit of the IS25LD040 is reset to the write –protected state after power-up. The WEL bit must be write enabled before any write operation, including sector, block erase, chip Figure 6 ...
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... Figure 9. Write Status Register Sequence SIO Integrated Silicon Solution, Inc.- www.issi.com Rev. B 2/12/2013 instruction, which can be used to check the progress or completion of an operation by reading the WIP bit of Status Register. or “1” s into the volatile BP2, BP1, BP0 and SRWD bits. IS25LD040 16 ...
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... DEVICE OPERATION (CONTINUED) READ COMMAND (READ DATA) OPERATION The Read Data (READ) instruction is used to read memory data of a IS25LD040 under normal mode running MHz. The READ instruction code is transmitted via the Sl line, followed by three address bytes (A23 - A0) of the first memory location to be read. A total of 24 address ...
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... The address is automatically incremented after each byte of data is shifted out. When the highest address is reached, the address counter will roll over to the 000000h address, allowing the entire memory to be read with a single FAST_READ instruction. The FAST_READ instruction is terminated by driving CE# , during the high ( IS25LD040 18 ...
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... FRDO instruction. FRDO instruction is terminated by driving CE# high ( BYTE ADDRESS DATA OUT IS25LD040 ). ... ... DATA OUT ...
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... Note: A program operation can alter “1”s into “0”s, but an erase operation is required to change “0”s back to “1”s. A byte cannot be reprogrammed without first erasing the whole sector or block. IS25LD040 20 ...
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... Refer to Figure 15 for Block Erase Sequence. CHIP_ER COMMAND (CHIP ERASE) OPERATION A Chip Erase (CHIP_ER) instruction erases the entire memory array of a IS25LD040. Before the execution of CHIP_ER instruction, the Write Enable Latch (WEL) must be set via a Write Enable (WREN) instruction. The WEL is reset automatically after completion of a chip erase operation ...
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... DEVICE OPERATION (CONTINUED) Figure 16. Sector Erase Sequence SIO Figure 17. Block Erase Sequence SIO Figure 18. Chip Erase Sequence SIO Integrated Silicon Solution, Inc.- www.issi.com Rev. B 2/12/2013 IS25LD040 22 ...
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... 2.1 mA 2.30V < V < 3.60V = -100 IS25LD040 +125 +125 Seconds Seconds IS25LD040 105 - - 105 - 125 C 2.30 V – 3.60 V Min Typ Max ...
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... CC t Write Status Register time (flash bit) w Integrated Silicon Solution, Inc.- www.issi.com Rev. B 2/12/2013 = 2. 3. Min Typ IS25LD040 Max Units 100 MHz 33 MHz 200 ns 200 ...
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... AC CHARACTERISTICS (CONTINUED) SERIAL INPUT/OUTPUT TIMING SIO Note: 1. For SPI Mode 0 (0,0) Integrated Silicon Solution, Inc.- www.issi.com Rev. B 2/12/2013 (1) IS25LD040 25 ...
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... PIN CAPACITANCE ( MHz 25°C ) Typ OUT Note: These parameters are characterized but not 100% tested. OUTPUT TEST LOAD Integrated Silicon Solution, Inc.- www.issi.com Rev. B 2/12/2013 Max Units INPUT TEST WAVEFORMS AND MEASUREMENT LEVEL IS25LD040 Conditions OUT 26 ...
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... At Power-down, when Vcc drops from the operating voltage, to below the Vwi, all write operations are disabled and the device does not respond to any write instruction. All Write Commands are Rejected tVCE tPUW Parameter IS25LD040 Read Access Allowed Device fully accessible Time Min. Max. Unit 10 us ...
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... From writing erase command to erase completion 2 5 From writing program command to program completion Min Typ Unit 200,000 Cycles 20 Years 2,000 Volts 200 Volts 100 + I mA CC1 IS25LD040 Test Method JEDEC Standard A117 JEDEC Standard A103 JEDEC Standard A114 JEDEC Standard A115 JEDEC Standard 78 28 ...
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... PACKAGE TYPE INFORMATION JB 8-Pin SOIC 208mil Broad Small Outline Integrated Circuit Package (Unit: millimeters) Note: Packages dimensions are shown in mm Integrated Silicon Solution, Inc.- www.issi.com Rev. B 2/12/2013 IS25LD040 29 ...
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... PACKAGE TYPE INFORMATION (CONTINUED) JN 8-Pin SOIC 150mil Broad Small Outline Integrated Circuit Package (Unit: millimeters) Note: Packages dimensions are shown in mm Integrated Silicon Solution, Inc.- www.issi.com Rev. B 2/12/2013 IS25LD040 30 ...
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... PACKAGE TYPE INFORMATION (CONTINUED) JV 8-pin VVSOP Package 150mil (Unit: millimeters) Note: Packages dimensions are shown in mm Integrated Silicon Solution, Inc.- www.issi.com Rev. B 2/12/2013 IS25LD040 31 ...
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... Integrated Silicon Solution, Inc.- www.issi.com Rev. B 2/12/2013 IS25LD040 32 ...
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... PACKAGE TYPE INFORMATION (CONTINUED) JK 8-Pin WSON Ultra-Thin Small Outline No-Lead Package (Unit: millimeters) Note: Packages dimensions are shown in mm Integrated Silicon Solution, Inc.- www.issi.com Rev. B 2/12/2013 IS25LD040 33 ...
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... PRODUCT ORDERING INFORMATION Integrated Silicon Solution, Inc.- www.issi.com Rev. B 2/12/2013 IS25LD040 34 ...
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... IS25LD040-JNLE 8-pin SOIC 150mil IS25LD040-JVLE 8-pin VVSOP 150mil IS25LD040-JKLE 8-pin WSON (5x6mm) IS25LD040-JBLA* 8-pin SOIC 208mil (Call Factory) IS25LD040-JNLA* 8-pin SOIC 150mil (Call Factory) IS25LD040-JVLA* 8-pin VVSOP 150mil (Call Factory) IS25LD040-JKLA* 8-pin WSON (5x6mm) (Call Factory) IS25LD040-JWLE* KGD (Call Factory) IS25LD040 35 ...