GLS36VF3204-70-4E-EKE Greenliant, GLS36VF3204-70-4E-EKE Datasheet - Page 5

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GLS36VF3204-70-4E-EKE

Manufacturer Part Number
GLS36VF3204-70-4E-EKE
Description
Flash 2Mx16 or 4Mx8 70ns
Manufacturer
Greenliant
Datasheet

Specifications of GLS36VF3204-70-4E-EKE

Rohs
yes
Data Bus Width
8 bit, 16 bit
Memory Type
Flash
Memory Size
32 Mbit
Architecture
Sectored
Timing Type
Asynchronous
Interface Type
Parallel
Access Time
70 ns
Supply Voltage - Max
3.6 V
Supply Voltage - Min
2.7 V
Maximum Operating Current
15 mA
Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
TSOP-48
Organization
2 MB x 16, 4 MB x 8

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
GLS36VF3204-70-4E-EKE
Manufacturer:
Greenliant
Quantity:
135
32 Mbit Concurrent SuperFlash
GLS36VF3203 / GLS36VF3204
Data Protection
The devices provide both hardware and software features
to protect nonvolatile data from inadvertent writes.
Hardware Data Protection
Noise/Glitch Protection: A WE# or CE# pulse of less than 5
ns will not initiate a Write cycle.
V
inhibited when V
Write Inhibit Mode: Forcing OE# low, CE# high, or WE#
high will inhibit the Write operation. This prevents inadver-
tent writes during power-up or power-down.
Hardware Block Protection
The devices provide hardware block protection which pro-
tects the outermost 8 KWord in the smaller bank. The block
is protected when WP# is held low. When WP# is held low
and a Block-Erase command is issued to the protected
black, the data in the outermost 8 KWord/16 KByte section
will be protected. The rest of the block will be erased. See
Tables 3 and 4 for Block-Protection location.
A user can disable block protection by driving WP# high.
This allows data to be erased or programmed into the pro-
tected sectors. WP# must be held high prior to issuing the
Write command and remain stable until after the entire
Write operation has completed. If WP# is left floating, it is
internally held high via a pull-up resistor, and the Boot Block
is unprotected, enabling Program and Erase operations on
that block.
Hardware Reset (RST#)
The RST# pin provides a hardware method of resetting the
devices to read array data. When the RST# pin is held low
for at least T
and return to Read mode (see Figure 17) and all output
pins are set to High-Z. When no internal Program/Erase
operation is in progress, a minimum period of T
required after RST# is driven high before a valid Read can
take place (see Figure 16).
The Erase operation that has been interrupted needs to be
reinitiated after the device resumes normal operation mode
to ensure data integrity.
©2010 Greenliant Systems, Ltd.
DD
Power Up/Down Detection: The Write operation is
RP,
DD
any in-progress operation will terminate
is less than 1.5V.
RHR
is
5
Software Data Protection (SDP)
These devices provide the JEDEC standard Software Data
Protection scheme for all data alteration operations, i.e.,
Program and Erase. Any Program operation requires the
inclusion of the three-byte sequence. The three-byte load
sequence is used to initiate the Program operation, provid-
ing optimal protection from inadvertent Write operations,
e.g., during the system power-up or power-down. Any
Erase operation requires the inclusion of the six-byte
sequence. The devices are shipped with the Software Data
Protection permanently enabled. See Table 7 for the spe-
cific software command codes. During SDP command
sequence, invalid commands will abort the device to Read
mode within T
V
sequence.
Common Flash Memory Interface (CFI)
These devices also contain the CFI information to
describe the characteristics of the devices. In order to
enter the CFI Query mode, the system must write the
three-byte sequence, same as the Software ID Entry com-
mand with 98H (CFI Query command) to address
BK
CFI Query mode, the system can also use the one-byte
sequence with BK
See Figure 13 for CFI Entry and Read timing diagram.
Once the device enters the CFI Query mode, the system
can read CFI data at the addresses given in Tables 8
through 10. The system must write the CFI Exit command
to return to Read mode from the CFI Query mode.
Security ID
The GLS36VF320x devices offer a 136-word Security ID
space. The Secure ID space is divided into two seg-
ments—one 128-bit factory programmed segment and one
128-word (256-byte) user-programmed segment. The first
segment is programmed and locked at Greenliant with a
unique, 128-bit number. The user segment is left un-pro-
grammed for the customer to program as desired. To pro-
gram the user segment of the Security ID, the user must
use the Security ID Program command. End-of-Write sta-
tus is checked by reading the toggle bits. Data# Polling is
not used for Security ID End-of-Write detection. Once pro-
gramming is complete, the Sec ID should be locked using
the User Sec ID Program Lock-Out. This disables any
future corruption of this space. Note that regardless of
whether or not the Sec ID is locked, neither Sec ID seg-
ment can be erased. The Secure ID space can be queried
IH,
X
555H in the last byte sequence. In order to enter the
but no other value during any SDP command
RC.
The contents of DQ
X
55H on Address and 98H on Data Bus.
15
-DQ
S71270-05-000
8
can be V
Data Sheet
IL
05/10
or

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