1893YI-10LFT IDT, 1893YI-10LFT Datasheet - Page 141
1893YI-10LFT
Manufacturer Part Number
1893YI-10LFT
Description
Ethernet ICs 3.3V 10/100 BASE TX INTEGRATED PHYCEIVER
Manufacturer
IDT
Datasheet
1.1893Y-10LFT.pdf
(152 pages)
Specifications of 1893YI-10LFT
Rohs
yes
Part # Aliases
ICS1893YI-10LFT
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10.5.15 100M MII / 100M Stream Interface: Receive Latency
ICS1893 Rev C 6/6/00
TP_RX
RXCLK
RXD
Table 10-22
time periods consist of timings of signals on the following pins:
•
•
•
Figure 10-16
Table 10-22. 100M MII / 100M Stream Interface Receive Latency Timing
Figure 10-16.
†
unscrambled.
Period
Time
TP_RX (that is, TP_RXP and TP_RXN)
RXCLK
RXD (that is, RXD[3:0])
Shown
t1
t2
ICS1893 - Release
†
First Bit of /J/ into TP_RX to /J/ on RXD 100M MII
First Bit of /J/ into TP_RX to /J/ on RXD 100M Stream Interface
lists the significant time periods for the 100M MII / 100M Stream Interface receive latency. The
shows the timing diagram for the time periods.
100M MII / 100M Stream Interface: Receive Latency Timing Diagram
Parameter
Copyright © 2000, Integrated Circuit Systems, Inc.
All rights reserved.
141
t1
t2
Conditions
Chapter 10 DC and AC Operating Conditions
Min. Typ. Max.
–
–
16
8
17
9
June, 2000
Bit times
Bit times
Units
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