1893YI-10LF IDT, 1893YI-10LF Datasheet - Page 135
![no-image](/images/no-image-200.jpg)
1893YI-10LF
Manufacturer Part Number
1893YI-10LF
Description
Ethernet ICs 3.3V 10/100 BASE TX INTEGRATED PHYCEIVER
Manufacturer
IDT
Datasheet
1.1893Y-10LFT.pdf
(152 pages)
Specifications of 1893YI-10LF
Rohs
yes
Part # Aliases
ICS1893YI-10LF
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10.5.9 10M Media Independent Interface: Receive Latency
ICS1893 Rev C 6/6/00
TP_RX
RXCLK
RXD
Table 10-16
signals on the following pins:
•
•
•
Figure 10-10
Table 10-16. 10M MII Receive Latency
Figure 10-10.
†
encoding is
not shown.
Period
Time
TP_RX (that is, the MII TP_RXP and TP_RXN pins)
RXCLK
RXD
Manchester
ICS1893 - Release
t1
†
First Bit of /5/ on TP_RX to /5/D/ on RXD
lists the significant time periods for the 10M MII timing. The time periods consist of timings of
shows the timing diagram for the time periods.
10M MII Receive Latency Timing Diagram
5
Parameter
Copyright © 2000, Integrated Circuit Systems, Inc.
All rights reserved.
135
5
t1
10M MII
Conditions
Chapter 10 DC and AC Operating Conditions
Min.
–
5
Typ.
6.5
Max.
7
Bit times
June, 2000
Units
D
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