LFX125EB-04FN516C Lattice, LFX125EB-04FN516C Datasheet - Page 68
LFX125EB-04FN516C
Manufacturer Part Number
LFX125EB-04FN516C
Description
FPGA - Field Programmable Gate Array E-Ser139K Gt ispJTA G 2.5/3.3V -4 Spd
Manufacturer
Lattice
Datasheet
1.LFX125EB-04F256C.pdf
(115 pages)
Specifications of LFX125EB-04FN516C
Product Category
FPGA - Field Programmable Gate Array
Rohs
yes
Number Of Gates
139 K
Number Of I/os
176
Operating Supply Voltage
2.5 V, 3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
FPBGA-516
Minimum Operating Temperature
0 C
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Lattice Semiconductor
ispXPGA Logic Signal Connections: 256-Ball fpBGA (Cont.)
256-fpBGA
Ball
M15
M14
M13
N16
M16
H14
H15
H16
H12
H13
G14
G15
G13
G16
K15
K14
K13
K16
F13
F16
F14
F15
E16
L13
L14
L15
L16
J13
J12
J14
J15
J16
-
-
-
-
-
-
-
-
-
-
GND (Bank 4)
GND (Bank 4)
GND (Bank 4)
GND (Bank 5)
GND (Bank 5)
GND (Bank 5)
Signal Name
BK4_IO12
BK4_IO13
BK4_IO14
BK4_IO15
BK4_IO18
BK4_IO19
BK4_IO20
BK4_IO21
BK4_IO22
BK4_IO23
BK4_IO24
BK4_IO25
BK5_IO10
BK5_IO11
BK5_IO12
BK5_IO13
BK5_IO14
BK4_IO5
BK4_IO8
BK4_IO9
BK5_IO0
BK5_IO1
BK5_IO2
BK5_IO3
BK5_IO6
BK5_IO7
GNDP1
GCLK4
GCLK5
VCCP1
GCLK6
GCLK7
-
-
-
-
SS_CLKOUT1N
SS_CLKOUT1P
HSI2B_SOUTN
HSI2B_SOUTP
HSI3A_SOUTP
SS_CLKIN1P
SS_CLKIN1N
HSI3A_SINP
HSI3A_SINN
CLK_OUT4
CLK_OUT5
CLK_OUT6
CLK_OUT7
PLL_RST4
PLL_RST5
PLL_RST7
PLL_RST6
PLL_FBK4
PLL_FBK5
PLL_FBK7
Function
Second
VREF4
LFX200
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
sysHSI Reserved
LVDS Pair2N
LVDS Pair3N
LVDS Pair2P
LVDS Pair3P
LVDS Pair/
54N/HSI2
56P/HSI2
56N/HSI2
58P/HSI2
58N/HSI2
59P/HSI2
59N/HSI2
70N/HSI3
71P/HSI3
71N/HSI3
72P/HSI3
61N
62N
63N
64N
65N
66N
68N
61P
62P
63P
64P
65P
66P
68P
70P
-
-
-
-
-
-
-
-
-
-
-
-
68
2
GND (Bank 4)
GND (Bank 4)
GND (Bank 5)
GND (Bank 5)
Signal Name
BK4_IO10
BK4_IO11
BK4_IO14
BK4_IO15
BK4_IO16
BK4_IO17
BK4_IO18
BK4_IO19
BK4_IO20
BK4_IO21
BK5_IO10
BK5_IO11
BK5_IO12
BK4_IO5
BK4_IO6
BK4_IO7
BK4_IO8
BK4_IO9
BK5_IO0
BK5_IO1
BK5_IO2
BK5_IO3
BK5_IO6
BK5_IO7
BK5_IO8
BK5_IO9
GNDP1
GCLK4
GCLK5
VCCP1
GCLK6
GCLK7
-
-
-
-
-
-
ispXPGA Family Data Sheet
SS_CLKOUT1N
SS_CLKOUT1P
HSI1A_SOUTP
SS_CLKIN1N
SS_CLKIN1P
HSI1A_SINP
HSI1A-SINN
CLK_OUT4
CLK_OUT5
CLK_OUT6
CLK_OUT7
PLL_RST4
PLL_RST5
PLL_FBK4
PLL_FBK5
PLL_RST7
PLL_RST6
PLL_FBK7
Function
Second
VREF4
LFX125
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
sysHSI Reserved
LVDS Pair2P
LVDS Pair2N
LVDS Pair3P
LVDS Pair3N
LVDS Pair/
58P/HSI1
58N/HSI1
59P/HSI1
59N/HSI1
60P/HSI1
60N/HSI1
61P/HSI1
46N
47N
48N
49N
51N
52N
53N
54N
55N
56N
47P
48P
49P
51P
52P
53P
54P
55P
56P
-
-
-
-
-
-
-
-
-
-
-
-
2
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